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Stephen Warrene04bfda2014-03-25 11:39:33 -06001/*
2 * (C) Copyright 2014
3 * NVIDIA Corporation <www.nvidia.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#include <common.h>
Simon Glasse3f44f52017-07-25 08:30:12 -06009#include <dm.h>
Thierry Reding6e2fca92014-12-09 22:25:21 -070010#include <power/as3722.h>
Simon Glasse3f44f52017-07-25 08:30:12 -060011#include <power/pmic.h>
Thierry Reding6e2fca92014-12-09 22:25:21 -070012
Stephen Warren93485322014-04-22 14:37:55 -060013#include <asm/arch/gpio.h>
Stephen Warrene04bfda2014-03-25 11:39:33 -060014#include <asm/arch/pinmux.h>
Thierry Reding6e2fca92014-12-09 22:25:21 -070015
Stephen Warrene04bfda2014-03-25 11:39:33 -060016#include "pinmux-config-jetson-tk1.h"
17
Thierry Reding6e2fca92014-12-09 22:25:21 -070018DECLARE_GLOBAL_DATA_PTR;
19
Stephen Warrene04bfda2014-03-25 11:39:33 -060020/*
21 * Routine: pinmux_init
22 * Description: Do individual peripheral pinmux configs
23 */
24void pinmux_init(void)
25{
Stephen Warrenc1fe92f2015-02-18 13:27:04 -070026 pinmux_clear_tristate_input_clamping();
Stephen Warren4ff213b2014-04-22 14:37:56 -060027
Stephen Warren93485322014-04-22 14:37:55 -060028 gpio_config_table(jetson_tk1_gpio_inits,
29 ARRAY_SIZE(jetson_tk1_gpio_inits));
30
Stephen Warrene04bfda2014-03-25 11:39:33 -060031 pinmux_config_pingrp_table(jetson_tk1_pingrps,
32 ARRAY_SIZE(jetson_tk1_pingrps));
33
34 pinmux_config_drvgrp_table(jetson_tk1_drvgrps,
35 ARRAY_SIZE(jetson_tk1_drvgrps));
Stephen Warrenbbca7102016-04-21 16:03:37 -060036
37 pinmux_config_mipipadctrlgrp_table(jetson_tk1_mipipadctrlgrps,
38 ARRAY_SIZE(jetson_tk1_mipipadctrlgrps));
Stephen Warrene04bfda2014-03-25 11:39:33 -060039}
Thierry Reding6e2fca92014-12-09 22:25:21 -070040
41#ifdef CONFIG_PCI_TEGRA
Simon Glasse3f44f52017-07-25 08:30:12 -060042/* TODO: Convert to driver model */
43static int as3722_sd_enable(struct udevice *pmic, unsigned int sd)
Thierry Reding6e2fca92014-12-09 22:25:21 -070044{
Thierry Reding6e2fca92014-12-09 22:25:21 -070045 int err;
46
Simon Glasse3f44f52017-07-25 08:30:12 -060047 if (sd > 6)
48 return -EINVAL;
49
50 err = pmic_clrsetbits(pmic, AS3722_SD_CONTROL, 0, 1 << sd);
Thierry Reding6e2fca92014-12-09 22:25:21 -070051 if (err) {
Simon Glasse3f44f52017-07-25 08:30:12 -060052 error("failed to update SD control register: %d", err);
Thierry Reding6e2fca92014-12-09 22:25:21 -070053 return err;
54 }
55
Simon Glasse3f44f52017-07-25 08:30:12 -060056 return 0;
57}
58
59int tegra_pcie_board_init(void)
60{
61 struct udevice *dev;
62 int ret;
63
64 ret = uclass_get_device_by_driver(UCLASS_PMIC,
65 DM_GET_DRIVER(pmic_as3722), &dev);
66 if (ret) {
67 debug("%s: Failed to find PMIC\n", __func__);
68 return ret;
Thierry Reding6e2fca92014-12-09 22:25:21 -070069 }
70
Simon Glasse3f44f52017-07-25 08:30:12 -060071 ret = as3722_sd_enable(dev, 4);
72 if (ret < 0) {
73 error("failed to enable SD4: %d\n", ret);
74 return ret;
75 }
76
77 ret = as3722_sd_set_voltage(dev, 4, 0x24);
78 if (ret < 0) {
79 error("failed to set SD4 voltage: %d\n", ret);
80 return ret;
Thierry Reding6e2fca92014-12-09 22:25:21 -070081 }
82
Thierry Reding6e2fca92014-12-09 22:25:21 -070083 return 0;
84}
Thierry Reding6e2fca92014-12-09 22:25:21 -070085#endif /* PCI */