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Reinhard Meyerd55c5c32010-10-30 23:09:58 +00001/*
2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * (C) Copyright 2010
7 * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#include <common.h>
29#include <net.h>
30#include <netdev.h>
31#include <mmc.h>
32#include <i2c.h>
33#include <spi.h>
34#include <asm/arch/at91sam9260.h>
35#include <asm/arch/at91sam9260_matrix.h>
36#include <asm/arch/at91sam9_smc.h>
37#include <asm/arch/at91_common.h>
38#include <asm/arch/at91_pmc.h>
39#include <asm/arch/at91_rstc.h>
40#include <asm/arch/at91_shdwn.h>
41#include <asm/arch/gpio.h>
42#include <asm/arch/io.h>
43#include <asm/arch/hardware.h>
44
45DECLARE_GLOBAL_DATA_PTR;
46
47#ifdef CONFIG_CMD_NAND
48static void nand_hw_init(void)
49{
50 unsigned long csa;
51
52 /* Enable CS3 */
53 csa = at91_sys_read(AT91_MATRIX_EBICSA);
54 at91_sys_write(AT91_MATRIX_EBICSA,
55 csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
56
57 /* Configure SMC CS3 for NAND/SmartMedia */
58 at91_sys_write(AT91_SMC_SETUP(3),
59 AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
60 AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
61 at91_sys_write(AT91_SMC_PULSE(3),
62 AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
63 AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
64 at91_sys_write(AT91_SMC_CYCLE(3),
65 AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
66 at91_sys_write(AT91_SMC_MODE(3),
67 AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
68 AT91_SMC_EXNWMODE_DISABLE |
69 AT91_SMC_DBW_8 |
70 AT91_SMC_TDF_(2));
71
72 /* Configure RDY/BSY */
73 at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
74
75 /* Enable NandFlash */
76 at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
77}
78#endif
79
80#ifdef CONFIG_MACB
81static void macb_hw_init(void)
82{
83 /* Enable EMAC clock */
84 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
85
86 /* Initialize EMAC=MACB hardware */
87 at91_macb_hw_init();
88}
89#endif
90
91#ifdef CONFIG_GENERIC_ATMEL_MCI
92/* this is a weak define that we are overriding */
93int board_mmc_init(bd_t *bd)
94{
95 /* Enable MCI clock */
96 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_MCI);
97
98 /* Initialize MCI hardware */
99 at91_mci_hw_init();
100
101 /* This calls the atmel_mmc_init in gen_atmel_mci.c */
102 return atmel_mci_init((void *)AT91_BASE_MCI);
103}
104
105/* this is a weak define that we are overriding */
106int board_mmc_getcd(u8 *cd, struct mmc *mmc)
107{
108 /*
109 * the only currently existing use of this function
110 * (fsl_esdhc.c) suggests this function must return
111 * *cs = TRUE if a card is NOT detected -> in most
112 * cases the value of the pin when the detect switch
113 * closes to GND
114 */
115 *cd = at91_get_gpio_value(CONFIG_SYS_MMC_CD_PIN) ? 1 : 0;
116 return 0;
117}
118
119#endif
120
121int board_early_init_f(void)
122{
Reinhard Meyerf8055482010-12-09 10:07:31 +0100123 struct at91_shdwn *shdwn = (struct at91_shdwn *)AT91_SHDWN_BASE;
Reinhard Meyerd55c5c32010-10-30 23:09:58 +0000124
125 /*
126 * make sure the board can be powered on by
127 * any transition on WKUP
128 */
129 writel(AT91_SHDW_MR_WKMODE0H2L | AT91_SHDW_MR_WKMODE0L2H,
130 &shdwn->mr);
131
132 /* Enable clocks for all PIOs */
133 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOA);
134 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOB);
135 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
136
137 /* set SCL0 and SDA0 to open drain */
138 at91_set_pio_output(I2C0_PORT, SCL0_PIN, 1);
139 at91_set_pio_multi_drive(I2C0_PORT, SCL0_PIN, 1);
140 at91_set_pio_pullup(I2C0_PORT, SCL0_PIN, 1);
141 at91_set_pio_output(I2C0_PORT, SDA0_PIN, 1);
142 at91_set_pio_multi_drive(I2C0_PORT, SDA0_PIN, 1);
143 at91_set_pio_pullup(I2C0_PORT, SDA0_PIN, 1);
144
145 /* set SCL1 and SDA1 to open drain */
146 at91_set_pio_output(I2C1_PORT, SCL1_PIN, 1);
147 at91_set_pio_multi_drive(I2C1_PORT, SCL1_PIN, 1);
148 at91_set_pio_pullup(I2C1_PORT, SCL1_PIN, 1);
149 at91_set_pio_output(I2C1_PORT, SDA1_PIN, 1);
150 at91_set_pio_multi_drive(I2C1_PORT, SDA1_PIN, 1);
151 at91_set_pio_pullup(I2C1_PORT, SDA1_PIN, 1);
152 return 0;
153}
154
155int board_init(void)
156{
157 /* arch number of TOP9000 Board */
158 gd->bd->bi_arch_number = MACH_TYPE_TOP9000;
159 /* adress of boot parameters */
160 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
161
162 at91_serial_hw_init();
163#ifdef CONFIG_CMD_NAND
164 nand_hw_init();
165#endif
166#ifdef CONFIG_MACB
167 macb_hw_init();
168#endif
169#ifdef CONFIG_ATMEL_SPI0
170 /* (n+4) denotes to use nSPISEL(0) in GPIO mode! */
171 at91_spi0_hw_init(1 << (FRAM_CS_NUM + 4));
172#endif
173#ifdef CONFIG_ATMEL_SPI1
174 at91_spi1_hw_init(1 << (ENC_CS_NUM + 4));
175#endif
176 return 0;
177}
178
179#ifdef CONFIG_MISC_INIT_R
180int misc_init_r(void)
181{
182 /* read 'factory' part of EEPROM */
183 read_factory_r();
184 return 0;
185}
186#endif
187
188int dram_init(void)
189{
190 gd->ram_size = get_ram_size(
191 (void *)CONFIG_SYS_SDRAM_BASE,
192 CONFIG_SYS_SDRAM_SIZE);
193 return 0;
194}
195
196#ifdef CONFIG_RESET_PHY_R
197void reset_phy(void)
198{
199 /*
200 * Initialize ethernet HW addresses prior to starting Linux,
201 * needed for nfsroot.
202 * TODO: We need to investigate if that is really necessary.
203 */
204 eth_init(gd->bd);
205}
206#endif
207
208int board_eth_init(bd_t *bis)
209{
210 int rc = 0;
211 int num = 0;
212#ifdef CONFIG_MACB
213 rc = macb_eth_initialize(0,
214 (void *)AT91_EMAC_BASE,
215 CONFIG_SYS_PHY_ID);
216 if (!rc)
217 num++;
218#endif
219#ifdef CONFIG_ENC28J60
220 rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM,
221 ENC_SPI_CLOCK, SPI_MODE_0);
222 if (!rc)
223 num++;
224# ifdef CONFIG_ENC28J60_2
225 rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+1,
226 ENC_SPI_CLOCK, SPI_MODE_0);
227 if (!rc)
228 num++;
229# ifdef CONFIG_ENC28J60_3
230 rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+2,
231 ENC_SPI_CLOCK, SPI_MODE_0);
232 if (!rc)
233 num++;
234# endif
235# endif
236#endif
237 return num;
238}
239
240/*
241 * I2C access functions
242 *
243 * Note:
244 * We need to access Bus 0 before relocation to access the
245 * environment settings.
246 * However i2c_get_bus_num() cannot be called before
247 * relocation.
248 */
249#ifdef CONFIG_SOFT_I2C
250void iic_init(void)
251{
252 /* ports are now initialized in board_early_init_f() */
253}
254
255int iic_read(void)
256{
257 switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
258 case 0:
259 return at91_get_pio_value(I2C0_PORT, SDA0_PIN);
260 case 1:
261 return at91_get_pio_value(I2C1_PORT, SDA1_PIN);
262 }
263 return 1;
264}
265
266void iic_sda(int bit)
267{
268 switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
269 case 0:
270 at91_set_pio_value(I2C0_PORT, SDA0_PIN, bit);
271 break;
272 case 1:
273 at91_set_pio_value(I2C1_PORT, SDA1_PIN, bit);
274 break;
275 }
276}
277
278void iic_scl(int bit)
279{
280 switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
281 case 0:
282 at91_set_pio_value(I2C0_PORT, SCL0_PIN, bit);
283 break;
284 case 1:
285 at91_set_pio_value(I2C1_PORT, SCL1_PIN, bit);
286 break;
287 }
288}
289
290#endif