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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2001, 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
24 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
25 * Neil Russell.
26 */
27
28#include <common.h>
29#ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
30#include <ioports.h>
31#endif
Peter Pearsed4fc6012007-08-14 10:10:52 +010032#ifdef CONFIG_AT91RM9200 /* need this for the at91rm9200 */
wdenk9d5028c2004-11-21 00:06:33 +000033#include <asm/io.h>
34#include <asm/arch/hardware.h>
35#endif
Wolfgang Denkba94a1b2006-05-30 15:56:48 +020036#ifdef CONFIG_IXP425 /* only valid for IXP425 */
37#include <asm/arch/ixp425.h>
38#endif
Peter Pearseb0d8f5b2007-05-09 11:37:56 +010039#ifdef CONFIG_LPC2292
40#include <asm/arch/hardware.h>
41#endif
wdenkc6097192002-11-03 00:24:07 +000042#include <i2c.h>
43
wdenkc6097192002-11-03 00:24:07 +000044/* #define DEBUG_I2C */
45
Wolfgang Denkd87080b2006-03-31 18:32:53 +020046#ifdef DEBUG_I2C
47DECLARE_GLOBAL_DATA_PTR;
48#endif
49
wdenkc6097192002-11-03 00:24:07 +000050
51/*-----------------------------------------------------------------------
52 * Definitions
53 */
54
55#define RETRIES 0
56
57
58#define I2C_ACK 0 /* PD_SDA level to ack a byte */
59#define I2C_NOACK 1 /* PD_SDA level to noack a byte */
60
61
62#ifdef DEBUG_I2C
63#define PRINTD(fmt,args...) do { \
wdenkc6097192002-11-03 00:24:07 +000064 if (gd->have_console) \
65 printf (fmt ,##args); \
66 } while (0)
67#else
68#define PRINTD(fmt,args...)
69#endif
70
Heiko Schocher799b7842008-10-15 09:34:45 +020071#if defined(CONFIG_I2C_MULTI_BUS)
72static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = 0;
73#endif /* CONFIG_I2C_MULTI_BUS */
74
wdenkc6097192002-11-03 00:24:07 +000075/*-----------------------------------------------------------------------
76 * Local functions
77 */
78static void send_reset (void);
79static void send_start (void);
80static void send_stop (void);
81static void send_ack (int);
82static int write_byte (uchar byte);
83static uchar read_byte (int);
84
85
86/*-----------------------------------------------------------------------
87 * Send a reset sequence consisting of 9 clocks with the data signal high
88 * to clock any confused device back into an idle state. Also send a
89 * <stop> at the end of the sequence for belts & suspenders.
90 */
91static void send_reset(void)
92{
93#ifdef CONFIG_MPC8260
94 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
95#endif
96#ifdef CONFIG_8xx
97 volatile immap_t *immr = (immap_t *)CFG_IMMR;
98#endif
99 int j;
100
wdenk60fbe252003-04-08 23:25:21 +0000101 I2C_SCL(1);
wdenkc6097192002-11-03 00:24:07 +0000102 I2C_SDA(1);
wdenk60fbe252003-04-08 23:25:21 +0000103#ifdef I2C_INIT
104 I2C_INIT;
105#endif
106 I2C_TRISTATE;
wdenkc6097192002-11-03 00:24:07 +0000107 for(j = 0; j < 9; j++) {
108 I2C_SCL(0);
109 I2C_DELAY;
110 I2C_DELAY;
111 I2C_SCL(1);
112 I2C_DELAY;
113 I2C_DELAY;
114 }
115 send_stop();
116 I2C_TRISTATE;
117}
118
119/*-----------------------------------------------------------------------
120 * START: High -> Low on SDA while SCL is High
121 */
122static void send_start(void)
123{
124#ifdef CONFIG_MPC8260
125 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
126#endif
127#ifdef CONFIG_8xx
128 volatile immap_t *immr = (immap_t *)CFG_IMMR;
129#endif
130
131 I2C_DELAY;
132 I2C_SDA(1);
133 I2C_ACTIVE;
134 I2C_DELAY;
135 I2C_SCL(1);
136 I2C_DELAY;
137 I2C_SDA(0);
138 I2C_DELAY;
139}
140
141/*-----------------------------------------------------------------------
142 * STOP: Low -> High on SDA while SCL is High
143 */
144static void send_stop(void)
145{
146#ifdef CONFIG_MPC8260
147 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
148#endif
149#ifdef CONFIG_8xx
150 volatile immap_t *immr = (immap_t *)CFG_IMMR;
151#endif
152
153 I2C_SCL(0);
154 I2C_DELAY;
155 I2C_SDA(0);
156 I2C_ACTIVE;
157 I2C_DELAY;
158 I2C_SCL(1);
159 I2C_DELAY;
160 I2C_SDA(1);
161 I2C_DELAY;
162 I2C_TRISTATE;
163}
164
165
166/*-----------------------------------------------------------------------
167 * ack should be I2C_ACK or I2C_NOACK
168 */
169static void send_ack(int ack)
170{
171#ifdef CONFIG_MPC8260
172 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
173#endif
174#ifdef CONFIG_8xx
175 volatile immap_t *immr = (immap_t *)CFG_IMMR;
176#endif
177
wdenkc6097192002-11-03 00:24:07 +0000178 I2C_SCL(0);
179 I2C_DELAY;
wdenkc6097192002-11-03 00:24:07 +0000180 I2C_ACTIVE;
Wolfgang Denkc15f80e2006-03-13 00:50:48 +0100181 I2C_SDA(ack);
wdenkc6097192002-11-03 00:24:07 +0000182 I2C_DELAY;
183 I2C_SCL(1);
184 I2C_DELAY;
185 I2C_DELAY;
186 I2C_SCL(0);
187 I2C_DELAY;
188}
189
190
191/*-----------------------------------------------------------------------
192 * Send 8 bits and look for an acknowledgement.
193 */
194static int write_byte(uchar data)
195{
196#ifdef CONFIG_MPC8260
197 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
198#endif
199#ifdef CONFIG_8xx
200 volatile immap_t *immr = (immap_t *)CFG_IMMR;
201#endif
202 int j;
203 int nack;
204
205 I2C_ACTIVE;
206 for(j = 0; j < 8; j++) {
207 I2C_SCL(0);
208 I2C_DELAY;
209 I2C_SDA(data & 0x80);
210 I2C_DELAY;
211 I2C_SCL(1);
212 I2C_DELAY;
213 I2C_DELAY;
214
215 data <<= 1;
216 }
217
218 /*
219 * Look for an <ACK>(negative logic) and return it.
220 */
221 I2C_SCL(0);
222 I2C_DELAY;
223 I2C_SDA(1);
224 I2C_TRISTATE;
225 I2C_DELAY;
226 I2C_SCL(1);
227 I2C_DELAY;
228 I2C_DELAY;
229 nack = I2C_READ;
230 I2C_SCL(0);
231 I2C_DELAY;
232 I2C_ACTIVE;
233
234 return(nack); /* not a nack is an ack */
235}
236
Heiko Schocher799b7842008-10-15 09:34:45 +0200237#if defined(CONFIG_I2C_MULTI_BUS)
238/*
239 * Functions for multiple I2C bus handling
240 */
241unsigned int i2c_get_bus_num(void)
242{
243 return i2c_bus_num;
244}
245
246int i2c_set_bus_num(unsigned int bus)
247{
248 if (bus >= CFG_MAX_I2C_BUS)
249 return -1;
250 i2c_bus_num = bus;
251
252 return 0;
253}
254
255/* TODO: add 100/400k switching */
256unsigned int i2c_get_bus_speed(void)
257{
258 return CFG_I2C_SPEED;
259}
260
261int i2c_set_bus_speed(unsigned int speed)
262{
263 if (speed != CFG_I2C_SPEED)
264 return -1;
265
266 return 0;
267}
268#endif
wdenkc6097192002-11-03 00:24:07 +0000269
270/*-----------------------------------------------------------------------
271 * if ack == I2C_ACK, ACK the byte so can continue reading, else
272 * send I2C_NOACK to end the read.
273 */
274static uchar read_byte(int ack)
275{
276#ifdef CONFIG_MPC8260
277 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
278#endif
279#ifdef CONFIG_8xx
280 volatile immap_t *immr = (immap_t *)CFG_IMMR;
281#endif
282 int data;
283 int j;
284
285 /*
286 * Read 8 bits, MSB first.
287 */
288 I2C_TRISTATE;
Haavard Skinnemoen110e0062008-05-16 11:08:11 +0200289 I2C_SDA(1);
wdenkc6097192002-11-03 00:24:07 +0000290 data = 0;
291 for(j = 0; j < 8; j++) {
292 I2C_SCL(0);
293 I2C_DELAY;
294 I2C_SCL(1);
295 I2C_DELAY;
296 data <<= 1;
297 data |= I2C_READ;
298 I2C_DELAY;
299 }
300 send_ack(ack);
301
302 return(data);
303}
304
305/*=====================================================================*/
306/* Public Functions */
307/*=====================================================================*/
308
309/*-----------------------------------------------------------------------
310 * Initialization
311 */
312void i2c_init (int speed, int slaveaddr)
313{
wdenkc6097192002-11-03 00:24:07 +0000314 /*
wdenk8bde7f72003-06-27 21:31:46 +0000315 * WARNING: Do NOT save speed in a static variable: if the
316 * I2C routines are called before RAM is initialized (to read
317 * the DIMM SPD, for instance), RAM won't be usable and your
318 * system will crash.
wdenkc6097192002-11-03 00:24:07 +0000319 */
320 send_reset ();
321}
322
323/*-----------------------------------------------------------------------
324 * Probe to see if a chip is present. Also good for checking for the
325 * completion of EEPROM writes since the chip stops responding until
326 * the write completes (typically 10mSec).
327 */
328int i2c_probe(uchar addr)
329{
330 int rc;
331
Wolfgang Denk82d716f2006-03-12 01:30:45 +0100332 /*
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100333 * perform 1 byte write transaction with just address byte
Wolfgang Denk82d716f2006-03-12 01:30:45 +0100334 * (fake write)
335 */
wdenkc6097192002-11-03 00:24:07 +0000336 send_start();
wdenk6aff3112002-12-17 01:51:00 +0000337 rc = write_byte ((addr << 1) | 0);
wdenkc6097192002-11-03 00:24:07 +0000338 send_stop();
339
340 return (rc ? 1 : 0);
341}
342
343/*-----------------------------------------------------------------------
344 * Read bytes
345 */
346int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
347{
348 int shift;
349 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
350 chip, addr, alen, buffer, len);
351
352#ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
353 /*
354 * EEPROM chips that implement "address overflow" are ones
355 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
356 * address and the extra bits end up in the "chip address"
357 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
358 * four 256 byte chips.
359 *
360 * Note that we consider the length of the address field to
361 * still be one byte because the extra address bits are
362 * hidden in the chip address.
363 */
364 chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
365
366 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
367 chip, addr);
368#endif
369
370 /*
371 * Do the addressing portion of a write cycle to set the
372 * chip's address pointer. If the address length is zero,
373 * don't do the normal write cycle to set the address pointer,
374 * there is no address pointer in this chip.
375 */
376 send_start();
377 if(alen > 0) {
378 if(write_byte(chip << 1)) { /* write cycle */
379 send_stop();
380 PRINTD("i2c_read, no chip responded %02X\n", chip);
381 return(1);
382 }
383 shift = (alen-1) * 8;
384 while(alen-- > 0) {
385 if(write_byte(addr >> shift)) {
386 PRINTD("i2c_read, address not <ACK>ed\n");
387 return(1);
388 }
389 shift -= 8;
390 }
391 send_stop(); /* reportedly some chips need a full stop */
392 send_start();
393 }
394 /*
395 * Send the chip address again, this time for a read cycle.
396 * Then read the data. On the last byte, we do a NACK instead
397 * of an ACK(len == 0) to terminate the read.
398 */
399 write_byte((chip << 1) | 1); /* read cycle */
400 while(len-- > 0) {
401 *buffer++ = read_byte(len == 0);
402 }
403 send_stop();
404 return(0);
405}
406
407/*-----------------------------------------------------------------------
408 * Write bytes
409 */
410int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
411{
412 int shift, failures = 0;
413
414 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
415 chip, addr, alen, buffer, len);
416
417 send_start();
418 if(write_byte(chip << 1)) { /* write cycle */
419 send_stop();
420 PRINTD("i2c_write, no chip responded %02X\n", chip);
421 return(1);
422 }
423 shift = (alen-1) * 8;
424 while(alen-- > 0) {
425 if(write_byte(addr >> shift)) {
426 PRINTD("i2c_write, address not <ACK>ed\n");
427 return(1);
428 }
429 shift -= 8;
430 }
431
432 while(len-- > 0) {
433 if(write_byte(*buffer++)) {
434 failures++;
435 }
436 }
437 send_stop();
438 return(failures);
439}
440
441/*-----------------------------------------------------------------------
442 * Read a register
443 */
444uchar i2c_reg_read(uchar i2c_addr, uchar reg)
445{
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200446 uchar buf;
wdenkc6097192002-11-03 00:24:07 +0000447
448 i2c_read(i2c_addr, reg, 1, &buf, 1);
449
450 return(buf);
451}
452
453/*-----------------------------------------------------------------------
454 * Write a register
455 */
456void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
457{
458 i2c_write(i2c_addr, reg, 1, &val, 1);
459}