| Bin Meng | de9ac9a | 2017-08-15 22:41:58 -0700 | [diff] [blame] | 1 | # |
| 2 | # Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com> |
| 3 | # |
| 4 | # SPDX-License-Identifier: GPL-2.0+ |
| 5 | # |
| 6 | |
| 7 | config INTEL_BRASWELL |
| 8 | bool |
| 9 | select HAVE_FSP |
| 10 | select ARCH_MISC_INIT |
| 11 | select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED |
| 12 | imply HAVE_INTEL_ME |
| 13 | imply HAVE_VBT |
| 14 | imply ENABLE_MRC_CACHE |
| Bin Meng | de9ac9a | 2017-08-15 22:41:58 -0700 | [diff] [blame] | 15 | imply AHCI_PCI |
| 16 | imply ICH_SPI |
| 17 | imply MMC |
| 18 | imply MMC_PCI |
| 19 | imply MMC_SDHCI |
| 20 | imply MMC_SDHCI_SDMA |
| 21 | imply SCSI |
| Tuomas Tynkkynen | 9fd95ef | 2017-12-08 15:36:19 +0200 | [diff] [blame] | 22 | imply SCSI_AHCI |
| Bin Meng | de9ac9a | 2017-08-15 22:41:58 -0700 | [diff] [blame] | 23 | imply SPI_FLASH |
| 24 | imply SYS_NS16550 |
| 25 | imply USB |
| 26 | imply USB_XHCI_HCD |
| 27 | imply VIDEO_FSP |
| 28 | |
| 29 | if INTEL_BRASWELL |
| 30 | |
| 31 | config FSP_ADDR |
| 32 | hex |
| 33 | default 0xfff20000 |
| 34 | |
| Bin Meng | de9ac9a | 2017-08-15 22:41:58 -0700 | [diff] [blame] | 35 | endif |