blob: de2dcac816c145b767595c762ad8a42a54ed1edc [file] [log] [blame]
Kumar Galaf852ce72007-11-29 00:15:30 -06001/*
Vivek Mahajancb0ff652009-09-22 12:48:27 +05302 * Copyright 2007-2009 Freescale Semiconductor, Inc.
Kumar Galaf852ce72007-11-29 00:15:30 -06003 *
4 * (C) Copyright 2000
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <common.h>
27#include <libfdt.h>
28#include <fdt_support.h>
Kumar Gala730b2fc2008-05-29 11:22:06 -050029#include <asm/processor.h>
Vivek Mahajancb0ff652009-09-22 12:48:27 +053030#include <linux/ctype.h>
Dipen Dudhatda1cd952009-09-02 11:25:08 +053031#ifdef CONFIG_FSL_ESDHC
32#include <fsl_esdhc.h>
33#endif
Kumar Galaf852ce72007-11-29 00:15:30 -060034
Trent Piepho58ec4862008-12-03 15:16:38 -080035DECLARE_GLOBAL_DATA_PTR;
36
Kumar Gala69018ce2008-01-17 08:25:45 -060037extern void ft_qe_setup(void *blob);
Poonam Aggrwalf8027f62009-09-02 19:40:36 +053038extern void ft_fixup_num_cores(void *blob);
Kim Phillips6b70ffb2008-06-16 15:55:53 -050039
Kumar Galaec2b74f2008-01-17 16:48:33 -060040#ifdef CONFIG_MP
41#include "mp.h"
Kumar Galaec2b74f2008-01-17 16:48:33 -060042
43void ft_fixup_cpu(void *blob, u64 memory_limit)
44{
45 int off;
Peter Tyser5ccd29c2009-10-23 15:55:47 -050046 ulong spin_tbl_addr = get_spin_phys_addr();
Kumar Galac840d262009-03-31 23:11:05 -050047 u32 bootpg = determine_mp_bootpg();
48 u32 id = get_my_id();
Kumar Galaec2b74f2008-01-17 16:48:33 -060049
50 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
51 while (off != -FDT_ERR_NOTFOUND) {
52 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
53
54 if (reg) {
55 if (*reg == id) {
56 fdt_setprop_string(blob, off, "status", "okay");
57 } else {
Kumar Gala0878af12008-04-18 11:29:01 -050058 u64 val = *reg * SIZE_BOOT_ENTRY + spin_tbl_addr;
Kumar Galaec2b74f2008-01-17 16:48:33 -060059 val = cpu_to_fdt32(val);
60 fdt_setprop_string(blob, off, "status",
61 "disabled");
62 fdt_setprop_string(blob, off, "enable-method",
63 "spin-table");
64 fdt_setprop(blob, off, "cpu-release-addr",
65 &val, sizeof(val));
66 }
67 } else {
68 printf ("cpu NULL\n");
69 }
70 off = fdt_node_offset_by_prop_value(blob, off,
71 "device_type", "cpu", 4);
72 }
73
74 /* Reserve the boot page so OSes dont use it */
75 if ((u64)bootpg < memory_limit) {
76 off = fdt_add_mem_rsv(blob, bootpg, (u64)4096);
77 if (off < 0)
78 printf("%s: %s\n", __FUNCTION__, fdt_strerror(off));
79 }
80}
81#endif
Kumar Gala69018ce2008-01-17 08:25:45 -060082
Kumar Gala1b3e4042009-03-19 09:16:10 -050083#define ft_fixup_l3cache(x, y)
84
85#if defined(CONFIG_L2_CACHE)
Kumar Gala730b2fc2008-05-29 11:22:06 -050086/* return size in kilobytes */
87static inline u32 l2cache_size(void)
88{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020089 volatile ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
Kumar Gala730b2fc2008-05-29 11:22:06 -050090 volatile u32 l2siz_field = (l2cache->l2ctl >> 28) & 0x3;
91 u32 ver = SVR_SOC_VER(get_svr());
92
93 switch (l2siz_field) {
94 case 0x0:
95 break;
96 case 0x1:
97 if (ver == SVR_8540 || ver == SVR_8560 ||
98 ver == SVR_8541 || ver == SVR_8541_E ||
99 ver == SVR_8555 || ver == SVR_8555_E)
100 return 128;
101 else
102 return 256;
103 break;
104 case 0x2:
105 if (ver == SVR_8540 || ver == SVR_8560 ||
106 ver == SVR_8541 || ver == SVR_8541_E ||
107 ver == SVR_8555 || ver == SVR_8555_E)
108 return 256;
109 else
110 return 512;
111 break;
112 case 0x3:
113 return 1024;
114 break;
115 }
116
117 return 0;
118}
119
120static inline void ft_fixup_l2cache(void *blob)
121{
122 int len, off;
123 u32 *ph;
124 struct cpu_type *cpu = identify_cpu(SVR_SOC_VER(get_svr()));
125 char compat_buf[38];
126
127 const u32 line_size = 32;
128 const u32 num_ways = 8;
129 const u32 size = l2cache_size() * 1024;
130 const u32 num_sets = size / (line_size * num_ways);
131
132 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
133 if (off < 0) {
134 debug("no cpu node fount\n");
135 return;
136 }
137
138 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0);
139
140 if (ph == NULL) {
141 debug("no next-level-cache property\n");
142 return ;
143 }
144
145 off = fdt_node_offset_by_phandle(blob, *ph);
146 if (off < 0) {
147 printf("%s: %s\n", __func__, fdt_strerror(off));
148 return ;
149 }
150
151 if (cpu) {
Vivek Mahajancb0ff652009-09-22 12:48:27 +0530152 if (isdigit(cpu->name[0]))
153 len = sprintf(compat_buf,
154 "fsl,mpc%s-l2-cache-controller", cpu->name);
155 else
156 len = sprintf(compat_buf,
157 "fsl,%c%s-l2-cache-controller",
158 tolower(cpu->name[0]), cpu->name + 1);
159
Kumar Gala730b2fc2008-05-29 11:22:06 -0500160 sprintf(&compat_buf[len + 1], "cache");
161 }
162 fdt_setprop(blob, off, "cache-unified", NULL, 0);
163 fdt_setprop_cell(blob, off, "cache-block-size", line_size);
Kumar Gala730b2fc2008-05-29 11:22:06 -0500164 fdt_setprop_cell(blob, off, "cache-size", size);
165 fdt_setprop_cell(blob, off, "cache-sets", num_sets);
166 fdt_setprop_cell(blob, off, "cache-level", 2);
167 fdt_setprop(blob, off, "compatible", compat_buf, sizeof(compat_buf));
Kumar Gala1b3e4042009-03-19 09:16:10 -0500168
169 /* we dont bother w/L3 since no platform of this type has one */
170}
171#elif defined(CONFIG_BACKSIDE_L2_CACHE)
172static inline void ft_fixup_l2cache(void *blob)
173{
174 int off, l2_off, l3_off = -1;
175 u32 *ph;
176 u32 l2cfg0 = mfspr(SPRN_L2CFG0);
177 u32 size, line_size, num_ways, num_sets;
178
179 size = (l2cfg0 & 0x3fff) * 64 * 1024;
180 num_ways = ((l2cfg0 >> 14) & 0x1f) + 1;
181 line_size = (((l2cfg0 >> 23) & 0x3) + 1) * 32;
182 num_sets = size / (line_size * num_ways);
183
184 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
185
186 while (off != -FDT_ERR_NOTFOUND) {
187 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0);
188
189 if (ph == NULL) {
190 debug("no next-level-cache property\n");
191 goto next;
192 }
193
194 l2_off = fdt_node_offset_by_phandle(blob, *ph);
195 if (l2_off < 0) {
196 printf("%s: %s\n", __func__, fdt_strerror(off));
197 goto next;
198 }
199
200 fdt_setprop(blob, l2_off, "cache-unified", NULL, 0);
201 fdt_setprop_cell(blob, l2_off, "cache-block-size", line_size);
202 fdt_setprop_cell(blob, l2_off, "cache-size", size);
203 fdt_setprop_cell(blob, l2_off, "cache-sets", num_sets);
204 fdt_setprop_cell(blob, l2_off, "cache-level", 2);
205 fdt_setprop(blob, l2_off, "compatible", "cache", 6);
206
207 if (l3_off < 0) {
208 ph = (u32 *)fdt_getprop(blob, l2_off, "next-level-cache", 0);
209
210 if (ph == NULL) {
211 debug("no next-level-cache property\n");
212 goto next;
213 }
214 l3_off = *ph;
215 }
216next:
217 off = fdt_node_offset_by_prop_value(blob, off,
218 "device_type", "cpu", 4);
219 }
220 if (l3_off > 0) {
221 l3_off = fdt_node_offset_by_phandle(blob, l3_off);
222 if (l3_off < 0) {
223 printf("%s: %s\n", __func__, fdt_strerror(off));
224 return ;
225 }
226 ft_fixup_l3cache(blob, l3_off);
227 }
Kumar Gala730b2fc2008-05-29 11:22:06 -0500228}
229#else
230#define ft_fixup_l2cache(x)
231#endif
232
233static inline void ft_fixup_cache(void *blob)
234{
235 int off;
236
237 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
238
239 while (off != -FDT_ERR_NOTFOUND) {
240 u32 l1cfg0 = mfspr(SPRN_L1CFG0);
241 u32 l1cfg1 = mfspr(SPRN_L1CFG1);
242 u32 isize, iline_size, inum_sets, inum_ways;
243 u32 dsize, dline_size, dnum_sets, dnum_ways;
244
245 /* d-side config */
246 dsize = (l1cfg0 & 0x7ff) * 1024;
247 dnum_ways = ((l1cfg0 >> 11) & 0xff) + 1;
248 dline_size = (((l1cfg0 >> 23) & 0x3) + 1) * 32;
249 dnum_sets = dsize / (dline_size * dnum_ways);
250
251 fdt_setprop_cell(blob, off, "d-cache-block-size", dline_size);
Kumar Gala730b2fc2008-05-29 11:22:06 -0500252 fdt_setprop_cell(blob, off, "d-cache-size", dsize);
253 fdt_setprop_cell(blob, off, "d-cache-sets", dnum_sets);
254
255 /* i-side config */
256 isize = (l1cfg1 & 0x7ff) * 1024;
257 inum_ways = ((l1cfg1 >> 11) & 0xff) + 1;
258 iline_size = (((l1cfg1 >> 23) & 0x3) + 1) * 32;
259 inum_sets = isize / (iline_size * inum_ways);
260
261 fdt_setprop_cell(blob, off, "i-cache-block-size", iline_size);
Kumar Gala730b2fc2008-05-29 11:22:06 -0500262 fdt_setprop_cell(blob, off, "i-cache-size", isize);
263 fdt_setprop_cell(blob, off, "i-cache-sets", inum_sets);
264
265 off = fdt_node_offset_by_prop_value(blob, off,
266 "device_type", "cpu", 4);
267 }
268
269 ft_fixup_l2cache(blob);
270}
271
272
Andy Fleming0e17f022008-10-07 08:09:50 -0500273void fdt_add_enet_stashing(void *fdt)
274{
275 do_fixup_by_compat(fdt, "gianfar", "bd-stash", NULL, 0, 1);
276
277 do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-len", 96, 1);
278
279 do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-idx", 0, 1);
280}
281
Kumar Galaf852ce72007-11-29 00:15:30 -0600282void ft_cpu_setup(void *blob, bd_t *bd)
283{
Haiying Wang2fc7eb02009-01-15 11:58:35 -0500284 int off;
285 int val;
286 sys_info_t sysinfo;
287
Kim Phillips6b70ffb2008-06-16 15:55:53 -0500288 /* delete crypto node if not on an E-processor */
289 if (!IS_E_PROCESSOR(get_svr()))
290 fdt_fixup_crypto_node(blob, 0);
291
Kumar Galaba37aa02008-08-19 15:41:18 -0500292 fdt_fixup_ethernet(blob);
Andy Fleming0e17f022008-10-07 08:09:50 -0500293
294 fdt_add_enet_stashing(blob);
Kumar Galaf852ce72007-11-29 00:15:30 -0600295
296 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
Kumar Gala3c2a67e2009-09-17 01:52:37 -0500297 "timebase-frequency", get_tbclk(), 1);
Kumar Galaf852ce72007-11-29 00:15:30 -0600298 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
299 "bus-frequency", bd->bi_busfreq, 1);
Haiying Wang2fc7eb02009-01-15 11:58:35 -0500300 get_sys_info(&sysinfo);
301 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
302 while (off != -FDT_ERR_NOTFOUND) {
303 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
304 val = cpu_to_fdt32(sysinfo.freqProcessor[*reg]);
305 fdt_setprop(blob, off, "clock-frequency", &val, 4);
306 off = fdt_node_offset_by_prop_value(blob, off, "device_type",
307 "cpu", 4);
308 }
Kumar Galaf852ce72007-11-29 00:15:30 -0600309 do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
310 "bus-frequency", bd->bi_busfreq, 1);
Trent Piepho58ec4862008-12-03 15:16:38 -0800311
312 do_fixup_by_compat_u32(blob, "fsl,pq3-localbus",
313 "bus-frequency", gd->lbc_clk, 1);
314 do_fixup_by_compat_u32(blob, "fsl,elbc",
315 "bus-frequency", gd->lbc_clk, 1);
Kumar Galaf852ce72007-11-29 00:15:30 -0600316#ifdef CONFIG_QE
Kumar Gala69018ce2008-01-17 08:25:45 -0600317 ft_qe_setup(blob);
Kumar Galaf852ce72007-11-29 00:15:30 -0600318#endif
319
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200320#ifdef CONFIG_SYS_NS16550
Kumar Galaf852ce72007-11-29 00:15:30 -0600321 do_fixup_by_compat_u32(blob, "ns16550",
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200322 "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
Kumar Galaf852ce72007-11-29 00:15:30 -0600323#endif
324
325#ifdef CONFIG_CPM2
326 do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart",
327 "current-speed", bd->bi_baudrate, 1);
328
329 do_fixup_by_compat_u32(blob, "fsl,cpm2-brg",
330 "clock-frequency", bd->bi_brgfreq, 1);
331#endif
332
333 fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
Kumar Galaec2b74f2008-01-17 16:48:33 -0600334
335#ifdef CONFIG_MP
336 ft_fixup_cpu(blob, (u64)bd->bi_memstart + (u64)bd->bi_memsize);
337#endif
Poonam Aggrwalf8027f62009-09-02 19:40:36 +0530338 ft_fixup_num_cores(blob);
Kumar Gala730b2fc2008-05-29 11:22:06 -0500339
340 ft_fixup_cache(blob);
Dipen Dudhatda1cd952009-09-02 11:25:08 +0530341
342#if defined(CONFIG_FSL_ESDHC)
343 fdt_fixup_esdhc(blob, bd);
344#endif
Kumar Galaf852ce72007-11-29 00:15:30 -0600345}