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Tom Warren3f82b1d2011-01-27 10:58:05 +00001/*
2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <ns16550.h>
Jimmy Zhangc5b34a22012-04-10 05:17:06 +000026#include <linux/compiler.h>
Tom Warren3f82b1d2011-01-27 10:58:05 +000027#include <asm/io.h>
Simon Glassb4ba2be2011-08-30 06:23:13 +000028#include <asm/arch/clock.h>
Tom Warren6d6c0ba2012-12-11 13:34:17 +000029#ifdef CONFIG_LCD
Simon Glass1b24a502012-10-17 13:24:52 +000030#include <asm/arch/display.h>
Tom Warren6d6c0ba2012-12-11 13:34:17 +000031#endif
Lucas Stachc0720af2012-09-29 10:02:09 +000032#include <asm/arch/funcmux.h>
Tom Warren3f82b1d2011-01-27 10:58:05 +000033#include <asm/arch/pinmux.h>
Simon Glass87236262012-04-02 13:18:54 +000034#include <asm/arch/pmu.h>
Tom Warren6d6c0ba2012-12-11 13:34:17 +000035#ifdef CONFIG_PWM_TEGRA
Simon Glasse1ae0d12012-10-17 13:24:49 +000036#include <asm/arch/pwm.h>
Tom Warren6d6c0ba2012-12-11 13:34:17 +000037#endif
Tom Warren150c2492012-09-19 15:50:56 -070038#include <asm/arch/tegra.h>
Tom Warren150c2492012-09-19 15:50:56 -070039#include <asm/arch-tegra/board.h>
40#include <asm/arch-tegra/clk_rst.h>
41#include <asm/arch-tegra/pmc.h>
42#include <asm/arch-tegra/sys_proto.h>
43#include <asm/arch-tegra/uart.h>
44#include <asm/arch-tegra/warmboot.h>
Tom Warren6d6c0ba2012-12-11 13:34:17 +000045#ifdef CONFIG_TEGRA_CLOCK_SCALING
46#include <asm/arch/emc.h>
47#endif
48#ifdef CONFIG_USB_EHCI_TEGRA
Lucas Stach7ae18f32013-02-07 07:16:29 +000049#include <asm/arch-tegra/usb.h>
Tom Warren6d6c0ba2012-12-11 13:34:17 +000050#endif
Tom Warrenc9aa8312013-02-21 12:31:30 +000051#ifdef CONFIG_TEGRA_MMC
Tom Warren190be1f2013-02-26 12:26:55 -070052#include <asm/arch-tegra/tegra_mmc.h>
Tom Warrenc9aa8312013-02-21 12:31:30 +000053#include <asm/arch-tegra/mmc.h>
54#endif
Simon Glasscb445fb2012-02-03 15:13:57 +000055#include <i2c.h>
Tom Warren6d6c0ba2012-12-11 13:34:17 +000056#include <spi.h>
Jimmy Zhangc5b34a22012-04-10 05:17:06 +000057#include "emc.h"
Tom Warren3f82b1d2011-01-27 10:58:05 +000058
59DECLARE_GLOBAL_DATA_PTR;
60
Tom Warren29f3e3f2012-09-04 17:00:24 -070061const struct tegra_sysinfo sysinfo = {
62 CONFIG_TEGRA_BOARD_STRING
Tom Warren3f82b1d2011-01-27 10:58:05 +000063};
64
Allen Martin45ec5b22012-08-31 08:30:08 +000065#ifndef CONFIG_SPL_BUILD
Tom Warren3f82b1d2011-01-27 10:58:05 +000066/*
67 * Routine: timer_init
68 * Description: init the timestamp and lastinc value
69 */
70int timer_init(void)
71{
Tom Warren3f82b1d2011-01-27 10:58:05 +000072 return 0;
73}
Allen Martin45ec5b22012-08-31 08:30:08 +000074#endif
Tom Warren3f82b1d2011-01-27 10:58:05 +000075
Simon Glassf10393e2012-02-27 10:52:50 +000076void __pin_mux_usb(void)
77{
78}
79
80void pin_mux_usb(void) __attribute__((weak, alias("__pin_mux_usb")));
81
Stephen Warrene0284942012-06-12 08:33:40 +000082void __pin_mux_spi(void)
83{
84}
85
86void pin_mux_spi(void) __attribute__((weak, alias("__pin_mux_spi")));
87
Lucas Stach0cd10c72012-09-25 20:21:14 +000088void __gpio_early_init_uart(void)
89{
90}
91
92void gpio_early_init_uart(void)
93__attribute__((weak, alias("__gpio_early_init_uart")));
94
Lucas Stachc0720af2012-09-29 10:02:09 +000095void __pin_mux_nand(void)
96{
97 funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT);
98}
99
100void pin_mux_nand(void) __attribute__((weak, alias("__pin_mux_nand")));
101
Marc Dietrich716d9432012-11-25 11:26:11 +0000102void __pin_mux_display(void)
103{
104}
105
106void pin_mux_display(void) __attribute__((weak, alias("__pin_mux_display")));
107
Tom Warrenf4ef6662011-04-14 12:09:41 +0000108/*
Wei Ni5aff0212012-04-02 13:18:58 +0000109 * Routine: power_det_init
110 * Description: turn off power detects
111 */
112static void power_det_init(void)
113{
Allen Martin00a27492012-08-31 08:30:00 +0000114#if defined(CONFIG_TEGRA20)
Tom Warren29f3e3f2012-09-04 17:00:24 -0700115 struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
Wei Ni5aff0212012-04-02 13:18:58 +0000116
117 /* turn off power detects */
118 writel(0, &pmc->pmc_pwr_det_latch);
119 writel(0, &pmc->pmc_pwr_det);
120#endif
121}
122
123/*
Tom Warren3f82b1d2011-01-27 10:58:05 +0000124 * Routine: board_init
125 * Description: Early hardware init.
126 */
127int board_init(void)
128{
Jimmy Zhangc5b34a22012-04-10 05:17:06 +0000129 __maybe_unused int err;
130
Simon Glassa04eba92011-11-05 04:46:51 +0000131 /* Do clocks and UART first so that printf() works */
Simon Glass4ed59e72011-09-21 12:40:04 +0000132 clock_init();
133 clock_verify();
134
Allen Martin78f47b72013-03-16 18:58:07 +0000135#ifdef CONFIG_FDT_SPI
Stephen Warrene0284942012-06-12 08:33:40 +0000136 pin_mux_spi();
Tom Warren9112ef82011-11-05 09:48:11 +0000137 spi_init();
138#endif
Allen Martinb19f5742013-01-29 13:51:28 +0000139
Simon Glasse1ae0d12012-10-17 13:24:49 +0000140#ifdef CONFIG_PWM_TEGRA
141 if (pwm_init(gd->fdt_blob))
142 debug("%s: Failed to init pwm\n", __func__);
143#endif
Simon Glass1b24a502012-10-17 13:24:52 +0000144#ifdef CONFIG_LCD
Marc Dietrich716d9432012-11-25 11:26:11 +0000145 pin_mux_display();
Simon Glass1b24a502012-10-17 13:24:52 +0000146 tegra_lcd_check_next_stage(gd->fdt_blob, 0);
147#endif
Tom Warren3f82b1d2011-01-27 10:58:05 +0000148 /* boot param addr */
149 gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
Wei Ni5aff0212012-04-02 13:18:58 +0000150
151 power_det_init();
152
Simon Glasscb445fb2012-02-03 15:13:57 +0000153#ifdef CONFIG_TEGRA_I2C
154#ifndef CONFIG_SYS_I2C_INIT_BOARD
155#error "You must define CONFIG_SYS_I2C_INIT_BOARD to use i2c on Nvidia boards"
156#endif
157 i2c_init_board();
Simon Glass87236262012-04-02 13:18:54 +0000158# ifdef CONFIG_TEGRA_PMU
159 if (pmu_set_nominal())
160 debug("Failed to select nominal voltages\n");
Jimmy Zhangc5b34a22012-04-10 05:17:06 +0000161# ifdef CONFIG_TEGRA_CLOCK_SCALING
162 err = board_emc_init();
163 if (err)
164 debug("Memory controller init failed: %d\n", err);
165# endif
166# endif /* CONFIG_TEGRA_PMU */
167#endif /* CONFIG_TEGRA_I2C */
Tom Warren3f82b1d2011-01-27 10:58:05 +0000168
Simon Glassf10393e2012-02-27 10:52:50 +0000169#ifdef CONFIG_USB_EHCI_TEGRA
170 pin_mux_usb();
171 board_usb_init(gd->fdt_blob);
172#endif
Simon Glass1b24a502012-10-17 13:24:52 +0000173#ifdef CONFIG_LCD
174 tegra_lcd_check_next_stage(gd->fdt_blob, 0);
175#endif
Simon Glassf10393e2012-02-27 10:52:50 +0000176
Lucas Stachc0720af2012-09-29 10:02:09 +0000177#ifdef CONFIG_TEGRA_NAND
178 pin_mux_nand();
179#endif
180
Tom Warren29f3e3f2012-09-04 17:00:24 -0700181#ifdef CONFIG_TEGRA_LP0
Allen Martina49716a2012-08-31 08:30:11 +0000182 /* save Sdram params to PMC 2, 4, and 24 for WB0 */
183 warmboot_save_sdram_params();
184
Simon Glass67ac5792012-04-02 13:18:57 +0000185 /* prepare the WB code to LP0 location */
186 warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE);
187#endif
188
Tom Warren3f82b1d2011-01-27 10:58:05 +0000189 return 0;
190}
Tom Warren21ef6a12011-05-31 10:30:37 +0000191
Simon Glass3e00dbd2011-09-21 12:40:03 +0000192#ifdef CONFIG_BOARD_EARLY_INIT_F
Thierry Redingcb7a1cf2012-06-04 20:02:27 +0000193static void __gpio_early_init(void)
194{
195}
196
197void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init")));
198
Simon Glass3e00dbd2011-09-21 12:40:03 +0000199int board_early_init_f(void)
200{
Tom Warren94829192013-01-28 13:32:12 +0000201#if !defined(CONFIG_TEGRA20)
Tom Warren6d6c0ba2012-12-11 13:34:17 +0000202 pinmux_init();
203#endif
Simon Glassf46a9452011-11-28 15:04:40 +0000204 board_init_uart_f();
Simon Glass3e00dbd2011-09-21 12:40:03 +0000205
206 /* Initialize periph GPIOs */
Thierry Redingcb7a1cf2012-06-04 20:02:27 +0000207 gpio_early_init();
Simon Glassa04eba92011-11-05 04:46:51 +0000208 gpio_early_init_uart();
Simon Glass1b24a502012-10-17 13:24:52 +0000209#ifdef CONFIG_LCD
210 tegra_lcd_early_init(gd->fdt_blob);
211#endif
Lucas Stach0cd10c72012-09-25 20:21:14 +0000212
Simon Glass3e00dbd2011-09-21 12:40:03 +0000213 return 0;
214}
215#endif /* EARLY_INIT */
Simon Glass1b24a502012-10-17 13:24:52 +0000216
217int board_late_init(void)
218{
219#ifdef CONFIG_LCD
220 /* Make sure we finish initing the LCD */
221 tegra_lcd_check_next_stage(gd->fdt_blob, 1);
222#endif
223 return 0;
224}
Tom Warrenc9aa8312013-02-21 12:31:30 +0000225
226#if defined(CONFIG_TEGRA_MMC)
227void __pin_mux_mmc(void)
228{
229}
230
231void pin_mux_mmc(void) __attribute__((weak, alias("__pin_mux_mmc")));
232
233/* this is a weak define that we are overriding */
234int board_mmc_init(bd_t *bd)
235{
236 debug("%s called\n", __func__);
237
238 /* Enable muxes, etc. for SDMMC controllers */
239 pin_mux_mmc();
240
241 debug("%s: init MMC\n", __func__);
242 tegra_mmc_init();
243
244 return 0;
245}
Tom Warren190be1f2013-02-26 12:26:55 -0700246
247void pad_init_mmc(struct mmc_host *host)
248{
249#if defined(CONFIG_TEGRA30)
250 enum periph_id id = host->mmc_id;
251 u32 val;
252
253 debug("%s: sdmmc address = %08x, id = %d\n", __func__,
254 (unsigned int)host->reg, id);
255
256 /* Set the pad drive strength for SDMMC1 or 3 only */
257 if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) {
258 debug("%s: settings are only valid for SDMMC1/SDMMC3!\n",
259 __func__);
260 return;
261 }
262
263 val = readl(&host->reg->sdmemcmppadctl);
264 val &= 0xFFFFFFF0;
265 val |= MEMCOMP_PADCTRL_VREF;
266 writel(val, &host->reg->sdmemcmppadctl);
267
268 val = readl(&host->reg->autocalcfg);
269 val &= 0xFFFF0000;
270 val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED;
271 writel(val, &host->reg->autocalcfg);
272#endif /* T30 */
273}
274#endif /* MMC */