Gitiles
Code Review Sign In
gerrit.cesnet.cz / github / trini / u-boot / de213c71a323ea823e21c72c3480c1931dcb3b44 / . / configs / P1020RDB-PD_SDCARD_defconfig
blob: ba3d2fa88d3abe63170175d4b941e8ff514c4d3f [file] [log] [blame]
Masahiro Yamada252ed872015-03-12 13:24:39 +0900[diff] [blame]1CONFIG_PPC=y
Tom Rini278b90c2018-02-03 12:10:38 -0500[diff] [blame]2CONFIG_SYS_TEXT_BASE=0x11001000
Simon Glass77d2f7f2016-09-12 23:18:41 -0600[diff] [blame]3CONFIG_SPL_LIBCOMMON_SUPPORT=y
Simon Glasscc4288e2016-09-12 23:18:43 -0600[diff] [blame]4CONFIG_SPL_LIBGENERIC_SUPPORT=y
Tom Rinia09fea12019-11-18 20:02:10 -0500[diff] [blame]5CONFIG_ENV_SIZE=0x2000
6CONFIG_ENV_OFFSET=0x0
Tom Rini7cfbba32021-08-28 21:34:49 -0400[diff] [blame]7CONFIG_SYS_MALLOC_LEN=0x100000
Tom Rini2bba7802021-06-28 10:17:29 -0400[diff] [blame]8CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd"
Tom Rinic5a6e9f2020-07-06 13:54:25 -0400[diff] [blame]9CONFIG_SPL_TEXT_BASE=0xf8f81000
Simon Glass103c5f12021-08-08 12:20:09 -0600[diff] [blame]10CONFIG_SPL_MMC=y
Simon Glass2a736062021-08-08 12:20:12 -0600[diff] [blame]11CONFIG_SPL_SERIAL=y
Tom Rinic9542ea2018-04-07 20:27:54 -0400[diff] [blame]12CONFIG_SPL=y
Masahiro Yamada252ed872015-03-12 13:24:39 +0900[diff] [blame]13CONFIG_MPC85xx=y
Simon Glass230ecd72017-05-17 03:25:15 -0600[diff] [blame]14# CONFIG_CMD_ERRATA is not set
York Sunf404b662016-11-17 13:53:33 -0800[diff] [blame]15CONFIG_TARGET_P1020RDB_PD=y
Simon Glass73223f02016-02-22 22:55:43 -0700[diff] [blame]16CONFIG_FIT=y
17CONFIG_FIT_VERBOSE=y
18CONFIG_OF_BOARD_SETUP=y
19CONFIG_OF_STDOUT_VIA_ALIAS=y
York Sunf404b662016-11-17 13:53:33 -0800[diff] [blame]20CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
Heiko Schocherbb597c02016-06-07 08:31:14 +0200[diff] [blame]21CONFIG_BOOTDELAY=10
Simon Glassa5d67542017-01-23 13:31:20 -0700[diff] [blame]22CONFIG_BOARD_EARLY_INIT_F=y
Mario Six02ddc142018-03-28 14:38:15 +0200[diff] [blame]23CONFIG_BOARD_EARLY_INIT_R=y
Tom Rini0817daa2020-10-09 12:22:06 -0400[diff] [blame]24# CONFIG_MISC_INIT_R is not set
Tom Rini75670c82018-02-06 12:15:38 -0500[diff] [blame]25# CONFIG_SPL_FRAMEWORK is not set
Tom Rinidb4080d2019-06-01 14:20:25 -0400[diff] [blame]26CONFIG_SPL_MMC_BOOT=y
Tom Rini8728c972017-03-13 13:48:42 -0400[diff] [blame]27CONFIG_SPL_ENV_SUPPORT=y
Simon Glass975e7cf2021-07-10 21:14:36 -0600[diff] [blame]28CONFIG_SPL_I2C=y
Simon Glass989e1ce2016-09-12 23:18:45 -0600[diff] [blame]29CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
Tom Riniadad96e2016-04-21 21:37:19 -0400[diff] [blame]30CONFIG_HUSH_PARSER=y
Adam Fordd021e942018-02-06 07:58:59 -0600[diff] [blame]31# CONFIG_AUTO_COMPLETE is not set
Tuomas Tynkkynenad12dc12017-10-08 21:48:01 +0300[diff] [blame]32CONFIG_CMD_IMLS=y
Tom Rini88cd7d02021-08-17 17:59:45 -0400[diff] [blame]33CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
34CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
Tom Rini88663122017-08-14 19:58:53 -0400[diff] [blame]35CONFIG_CMD_I2C=y
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]36CONFIG_CMD_MMC=y
Tom Rini78d1e1d2016-04-22 16:41:25 -0400[diff] [blame]37CONFIG_CMD_USB=y
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]38CONFIG_CMD_MII=y
Tom Rini78d1e1d2016-04-22 16:41:25 -0400[diff] [blame]39CONFIG_CMD_PING=y
Siva Durga Prasad Paladugu0fd2290c2018-06-19 12:24:23 +0200[diff] [blame]40CONFIG_MP=y
Simon Glass551c3932017-05-17 03:25:25 -0600[diff] [blame]41# CONFIG_CMD_HASH is not set
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]42CONFIG_CMD_EXT2=y
43CONFIG_CMD_FAT=y
Tom Rinid56b4b12017-07-22 18:36:16 -0400[diff] [blame]44CONFIG_CMD_MTDPARTS=y
Tom Rini43ede0b2017-10-22 17:55:07 -0400[diff] [blame]45CONFIG_MTDIDS_DEFAULT="nor0=ec000000.nor"
46CONFIG_MTDPARTS_DEFAULT="mtdparts=ec000000.nor:128k(dtb),6016k(kernel),57088k(fs),1m(vsc7385-firmware),1280k(u-boot)"
Hou Zhiqiangec70ced2019-08-20 09:35:28 +0000[diff] [blame]47CONFIG_OF_CONTROL=y
Adam Forde91907a2020-07-03 06:48:56 -0500[diff] [blame]48CONFIG_ENV_OVERWRITE=y
Tom Rini5dc4dfd2017-08-28 07:16:32 -0400[diff] [blame]49CONFIG_ENV_IS_IN_MMC=y
Tom Rini8d8ee472019-11-12 22:46:36 -0500[diff] [blame]50CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rini665c35a2019-09-23 11:47:37 -0400[diff] [blame]51CONFIG_DM=y
Tom Riniefb5dab72021-08-21 13:50:17 -0400[diff] [blame]52CONFIG_DDR_CLK_FREQ=66666666
Tom Rinib11dc332020-05-08 09:08:39 -0400[diff] [blame]53CONFIG_DM_I2C=y
Tom Rini55dabcc2021-08-18 23:12:24 -0400[diff] [blame]54CONFIG_SPL_SYS_I2C_LEGACY=y
Tom Rinifc8d3b92021-08-18 23:12:37 -0400[diff] [blame]55CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
Tom Rini6d5d0c92021-08-18 23:12:35 -0400[diff] [blame]56CONFIG_SYS_I2C_FSL=y
57CONFIG_SYS_FSL_I2C_OFFSET=0x3000
58CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
59CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
Tom Rini88cd7d02021-08-17 17:59:45 -0400[diff] [blame]60CONFIG_SYS_I2C_EEPROM_ADDR=0x52
Mario Six07dea2e2018-03-28 14:38:19 +0200[diff] [blame]61CONFIG_FSL_ESDHC=y
Tom Rini0cfccb52019-12-04 17:18:38 -0500[diff] [blame]62CONFIG_MTD=y
Adam Ford2fe88d42018-10-14 15:10:50 -0500[diff] [blame]63CONFIG_MTD_NOR_FLASH=y
64CONFIG_FLASH_CFI_DRIVER=y
65CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
66CONFIG_FLASH_CFI_MTD=y
67CONFIG_SYS_FLASH_CFI=y
Tom Rinib24550a2020-10-05 13:11:41 -0400[diff] [blame]68CONFIG_DM_SPI_FLASH=y
Patrick Delaunay14453fb2019-02-27 15:20:36 +0100[diff] [blame]69CONFIG_SF_DEFAULT_MODE=0
70CONFIG_SF_DEFAULT_SPEED=10000000
Bin Meng68d53422015-11-25 05:34:54 -0800[diff] [blame]71CONFIG_SPI_FLASH_SPANSION=y
Tom Rini306881a2020-04-24 15:35:53 -0400[diff] [blame]72CONFIG_PHY_ATHEROS=y
73CONFIG_PHY_BROADCOM=y
74CONFIG_PHY_DAVICOM=y
75CONFIG_PHY_LXT=y
Mario Sixa8ca5c82018-04-27 14:52:21 +0200[diff] [blame]76CONFIG_PHY_MARVELL=y
Tom Rini306881a2020-04-24 15:35:53 -0400[diff] [blame]77CONFIG_PHY_NATSEMI=y
78CONFIG_PHY_REALTEK=y
79CONFIG_PHY_SMSC=y
80CONFIG_PHY_VITESSE=y
Tom Rinib24550a2020-10-05 13:11:41 -0400[diff] [blame]81CONFIG_PHY_FIXED=y
82CONFIG_DM_ETH=y
83CONFIG_DM_MDIO=y
Tom Rini19893742017-08-07 22:00:34 -0400[diff] [blame]84CONFIG_PHY_GIGE=y
Simon Glassa77fda12015-08-19 09:33:43 -0600[diff] [blame]85CONFIG_E1000=y
Tom Rini665c35a2019-09-23 11:47:37 -0400[diff] [blame]86CONFIG_MII=y
87CONFIG_TSEC_ENET=y
Hou Zhiqiang2bc49ec2019-08-27 11:04:11 +0000[diff] [blame]88CONFIG_PCIE_FSL=y
Tom Rinib11dc332020-05-08 09:08:39 -0400[diff] [blame]89CONFIG_DM_RTC=y
Thomas Chou9e390032015-11-19 21:48:14 +0800[diff] [blame]90CONFIG_SYS_NS16550=y
Adam Fordf1b1f772018-04-15 13:51:26 -0400[diff] [blame]91CONFIG_SPI=y
Tom Rinib24550a2020-10-05 13:11:41 -0400[diff] [blame]92CONFIG_DM_SPI=y
Bin Menge5d5d442015-11-25 05:34:53 -0800[diff] [blame]93CONFIG_FSL_ESPI=y
Tom Rini645176d2016-09-08 16:31:26 -0400[diff] [blame]94CONFIG_USB=y
Tom Rinib24550a2020-10-05 13:11:41 -0400[diff] [blame]95CONFIG_USB_STORAGE=y