Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2004 Freescale Semiconductor. |
Jon Loeliger | c934f65 | 2006-05-31 13:55:35 -0500 | [diff] [blame] | 3 | * Jeff Brown |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 4 | * Srikanth Srinivasan (srikanth.srinivasan@freescale.com) |
| 5 | * |
| 6 | * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com> |
| 7 | * |
| 8 | * See file CREDITS for list of people who contributed to this |
| 9 | * project. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU General Public License as |
| 13 | * published by the Free Software Foundation; either version 2 of |
| 14 | * the License, or (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 24 | * MA 02111-1307 USA |
| 25 | */ |
| 26 | |
| 27 | #include <common.h> |
Jon Loeliger | 4d3d729 | 2006-05-31 11:24:28 -0500 | [diff] [blame] | 28 | #include <command.h> |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 29 | #include <pci.h> |
| 30 | #include <asm/processor.h> |
| 31 | #include <asm/immap_86xx.h> |
| 32 | #include <spd.h> |
| 33 | |
| 34 | #if defined(CONFIG_OF_FLAT_TREE) |
| 35 | #include <ft_build.h> |
| 36 | extern void ft_cpu_setup(void *blob, bd_t *bd); |
| 37 | #endif |
| 38 | |
Jon Loeliger | 4d3d729 | 2006-05-31 11:24:28 -0500 | [diff] [blame] | 39 | #include "pixis.h" |
| 40 | |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 41 | #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) |
| 42 | extern void ddr_enable_ecc(unsigned int dram_size); |
| 43 | #endif |
| 44 | |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 45 | #if defined(CONFIG_SPD_EEPROM) |
| 46 | #include "spd_sdram.h" |
| 47 | #endif |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 48 | |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 49 | void sdram_init(void); |
| 50 | long int fixed_sdram(void); |
| 51 | |
| 52 | |
| 53 | int board_early_init_f (void) |
| 54 | { |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 55 | return 0; |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 56 | } |
| 57 | |
| 58 | int checkboard (void) |
| 59 | { |
| 60 | puts("Board: MPC8641HPCN\n"); |
| 61 | |
| 62 | #ifdef CONFIG_PCI |
| 63 | |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 64 | volatile immap_t *immap = (immap_t *) CFG_CCSRBAR; |
| 65 | volatile ccsr_gur_t *gur = &immap->im_gur; |
| 66 | volatile ccsr_pex_t *pex1 = &immap->im_pex1; |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 67 | |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 68 | uint devdisr = gur->devdisr; |
| 69 | uint io_sel = (gur->pordevsr & MPC86xx_PORDEVSR_IO_SEL) >> 16; |
| 70 | uint host1_agent = (gur->porbmsr & MPC86xx_PORBMSR_HA) >> 17; |
| 71 | uint pex1_agent = (host1_agent == 0) || (host1_agent == 1); |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 72 | |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 73 | if ((io_sel == 2 || io_sel == 3 || io_sel == 5 |
| 74 | || io_sel == 6 || io_sel == 7 || io_sel == 0xF) |
| 75 | && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) { |
| 76 | debug("PCI-EXPRESS 1: %s \n", pex1_agent ? "Agent" : "Host"); |
| 77 | debug("0x%08x=0x%08x ", &pex1->pme_msg_det, pex1->pme_msg_det); |
| 78 | if (pex1->pme_msg_det) { |
| 79 | pex1->pme_msg_det = 0xffffffff; |
| 80 | debug(" with errors. Clearing. Now 0x%08x", |
| 81 | pex1->pme_msg_det); |
| 82 | } |
| 83 | debug ("\n"); |
| 84 | } else { |
| 85 | puts("PCI-EXPRESS 1: Disabled\n"); |
| 86 | } |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 87 | |
| 88 | #else |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 89 | puts("PCI-EXPRESS1: Disabled\n"); |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 90 | #endif |
| 91 | |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 92 | return 0; |
| 93 | } |
| 94 | |
| 95 | |
| 96 | long int |
| 97 | initdram(int board_type) |
| 98 | { |
| 99 | long dram_size = 0; |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 100 | |
| 101 | #if defined(CONFIG_SPD_EEPROM) |
| 102 | dram_size = spd_sdram (); |
| 103 | #else |
| 104 | dram_size = fixed_sdram (); |
| 105 | #endif |
| 106 | |
| 107 | #if defined(CFG_RAMBOOT) |
| 108 | puts(" DDR: "); |
| 109 | return dram_size; |
| 110 | #endif |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 111 | |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 112 | #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) |
| 113 | /* |
| 114 | * Initialize and enable DDR ECC. |
| 115 | */ |
| 116 | ddr_enable_ecc(dram_size); |
| 117 | #endif |
| 118 | |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 119 | puts(" DDR: "); |
| 120 | return dram_size; |
| 121 | } |
| 122 | |
| 123 | |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 124 | #if defined(CFG_DRAM_TEST) |
Jon Loeliger | 5c9efb3 | 2006-04-27 10:15:16 -0500 | [diff] [blame] | 125 | int testdram(void) |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 126 | { |
| 127 | uint *pstart = (uint *) CFG_MEMTEST_START; |
| 128 | uint *pend = (uint *) CFG_MEMTEST_END; |
| 129 | uint *p; |
| 130 | |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 131 | puts("SDRAM test phase 1:\n"); |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 132 | for (p = pstart; p < pend; p++) |
| 133 | *p = 0xaaaaaaaa; |
| 134 | |
| 135 | for (p = pstart; p < pend; p++) { |
| 136 | if (*p != 0xaaaaaaaa) { |
| 137 | printf ("SDRAM test fails at: %08x\n", (uint) p); |
| 138 | return 1; |
| 139 | } |
| 140 | } |
| 141 | |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 142 | puts("SDRAM test phase 2:\n"); |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 143 | for (p = pstart; p < pend; p++) |
| 144 | *p = 0x55555555; |
| 145 | |
| 146 | for (p = pstart; p < pend; p++) { |
| 147 | if (*p != 0x55555555) { |
| 148 | printf ("SDRAM test fails at: %08x\n", (uint) p); |
| 149 | return 1; |
| 150 | } |
| 151 | } |
| 152 | |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 153 | puts("SDRAM test passed.\n"); |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 154 | return 0; |
| 155 | } |
| 156 | #endif |
| 157 | |
| 158 | |
| 159 | #if !defined(CONFIG_SPD_EEPROM) |
Jon Loeliger | 5c9efb3 | 2006-04-27 10:15:16 -0500 | [diff] [blame] | 160 | /* |
| 161 | * Fixed sdram init -- doesn't use serial presence detect. |
| 162 | */ |
| 163 | long int fixed_sdram(void) |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 164 | { |
| 165 | #if !defined(CFG_RAMBOOT) |
| 166 | volatile immap_t *immap = (immap_t *)CFG_IMMR; |
| 167 | volatile ccsr_ddr_t *ddr= &immap->im_ddr1; |
| 168 | |
| 169 | ddr->cs0_bnds = CFG_DDR_CS0_BNDS; |
| 170 | ddr->cs0_config = CFG_DDR_CS0_CONFIG; |
| 171 | ddr->ext_refrec = CFG_DDR_EXT_REFRESH; |
| 172 | ddr->timing_cfg_0 = CFG_DDR_TIMING_0; |
| 173 | ddr->timing_cfg_1 = CFG_DDR_TIMING_1; |
| 174 | ddr->timing_cfg_2 = CFG_DDR_TIMING_2; |
| 175 | ddr->sdram_mode_1 = CFG_DDR_MODE_1; |
| 176 | ddr->sdram_mode_2 = CFG_DDR_MODE_2; |
| 177 | ddr->sdram_interval = CFG_DDR_INTERVAL; |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 178 | ddr->sdram_data_init = CFG_DDR_DATA_INIT; |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 179 | ddr->sdram_clk_cntl = CFG_DDR_CLK_CTRL; |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 180 | ddr->sdram_ocd_cntl = CFG_DDR_OCD_CTRL; |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 181 | ddr->sdram_ocd_status = CFG_DDR_OCD_STATUS; |
| 182 | |
| 183 | #if defined (CONFIG_DDR_ECC) |
| 184 | ddr->err_disable = 0x0000008D; |
| 185 | ddr->err_sbe = 0x00ff0000; |
| 186 | #endif |
| 187 | asm("sync;isync"); |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 188 | |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 189 | udelay(500); |
| 190 | |
| 191 | #if defined (CONFIG_DDR_ECC) |
| 192 | /* Enable ECC checking */ |
| 193 | ddr->sdram_cfg_1 = (CFG_DDR_CONTROL | 0x20000000); |
| 194 | #else |
| 195 | ddr->sdram_cfg_1 = CFG_DDR_CONTROL; |
| 196 | ddr->sdram_cfg_2 = CFG_DDR_CONTROL2; |
| 197 | #endif |
| 198 | asm("sync; isync"); |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 199 | |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 200 | udelay(500); |
| 201 | #endif |
| 202 | return CFG_SDRAM_SIZE * 1024 * 1024; |
| 203 | } |
| 204 | #endif /* !defined(CONFIG_SPD_EEPROM) */ |
| 205 | |
| 206 | |
| 207 | #if defined(CONFIG_PCI) |
| 208 | /* |
| 209 | * Initialize PCI Devices, report devices found. |
| 210 | */ |
| 211 | |
| 212 | #ifndef CONFIG_PCI_PNP |
| 213 | static struct pci_config_table pci_fsl86xxads_config_table[] = { |
| 214 | { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, |
| 215 | PCI_IDSEL_NUMBER, PCI_ANY_ID, |
| 216 | pci_cfgfunc_config_device, { PCI_ENET0_IOADDR, |
| 217 | PCI_ENET0_MEMADDR, |
| 218 | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
| 219 | } }, |
| 220 | { } |
| 221 | }; |
| 222 | #endif |
| 223 | |
| 224 | |
| 225 | static struct pci_controller hose = { |
| 226 | #ifndef CONFIG_PCI_PNP |
| 227 | config_table: pci_mpc86xxcts_config_table, |
| 228 | #endif |
| 229 | }; |
| 230 | |
| 231 | #endif /* CONFIG_PCI */ |
| 232 | |
| 233 | |
| 234 | void |
| 235 | pci_init_board(void) |
| 236 | { |
| 237 | #ifdef CONFIG_PCI |
| 238 | extern void pci_mpc86xx_init(struct pci_controller *hose); |
| 239 | |
| 240 | pci_mpc86xx_init(&hose); |
| 241 | #endif /* CONFIG_PCI */ |
| 242 | } |
| 243 | |
| 244 | #if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) |
| 245 | void |
| 246 | ft_board_setup(void *blob, bd_t *bd) |
| 247 | { |
| 248 | u32 *p; |
| 249 | int len; |
| 250 | |
| 251 | ft_cpu_setup(blob, bd); |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 252 | |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 253 | p = ft_get_prop(blob, "/memory/reg", &len); |
| 254 | if (p != NULL) { |
| 255 | *p++ = cpu_to_be32(bd->bi_memstart); |
| 256 | *p = cpu_to_be32(bd->bi_memsize); |
| 257 | } |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 258 | } |
| 259 | #endif |
| 260 | |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 261 | |
Jon Loeliger | 4d3d729 | 2006-05-31 11:24:28 -0500 | [diff] [blame] | 262 | void |
| 263 | mpc8641_reset_board(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 264 | { |
| 265 | char cmd; |
| 266 | ulong val; |
| 267 | ulong corepll; |
Jon Loeliger | debb735 | 2006-04-26 17:58:56 -0500 | [diff] [blame] | 268 | |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 269 | /* |
| 270 | * No args is a simple reset request. |
| 271 | */ |
| 272 | if (argv <= 0) { |
| 273 | out8(PIXIS_BASE + PIXIS_RST, 0); |
| 274 | /* not reached */ |
| 275 | } |
| 276 | |
| 277 | cmd = argv[1][1]; |
| 278 | switch (cmd) { |
| 279 | case 'f': /* reset with frequency changed */ |
| 280 | if (argc < 5) |
| 281 | goto my_usage; |
| 282 | read_from_px_regs(0); |
| 283 | |
| 284 | val = set_px_sysclk(simple_strtoul(argv[2], NULL, 10)); |
| 285 | |
| 286 | corepll = strfractoint(argv[3]); |
| 287 | val = val + set_px_corepll(corepll); |
| 288 | val = val + set_px_mpxpll(simple_strtoul(argv[4], NULL, 10)); |
| 289 | if (val == 3) { |
| 290 | puts("Setting registers VCFGEN0 and VCTL\n"); |
| 291 | read_from_px_regs(1); |
| 292 | puts("Resetting board with values from VSPEED0, VSPEED1, VCLKH, and VCLKL ....\n"); |
| 293 | set_px_go(); |
| 294 | } else |
| 295 | goto my_usage; |
| 296 | |
| 297 | while (1); /* Not reached */ |
| 298 | |
| 299 | case 'l': |
| 300 | if (argv[2][1] == 'f') { |
Jon Loeliger | 4d3d729 | 2006-05-31 11:24:28 -0500 | [diff] [blame] | 301 | read_from_px_regs(0); |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 302 | read_from_px_regs_altbank(0); |
| 303 | /* reset with frequency changed */ |
| 304 | val = set_px_sysclk(simple_strtoul(argv[3], NULL, 10)); |
Jon Loeliger | 4d3d729 | 2006-05-31 11:24:28 -0500 | [diff] [blame] | 305 | |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 306 | corepll = strfractoint(argv[4]); |
Jon Loeliger | 4d3d729 | 2006-05-31 11:24:28 -0500 | [diff] [blame] | 307 | val = val + set_px_corepll(corepll); |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 308 | val = val + set_px_mpxpll(simple_strtoul(argv[5], NULL, 10)); |
Jon Loeliger | 4d3d729 | 2006-05-31 11:24:28 -0500 | [diff] [blame] | 309 | if (val == 3) { |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 310 | puts("Setting registers VCFGEN0, VCFGEN1, VBOOT, and VCTL\n"); |
| 311 | set_altbank(); |
Jon Loeliger | 4d3d729 | 2006-05-31 11:24:28 -0500 | [diff] [blame] | 312 | read_from_px_regs(1); |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 313 | read_from_px_regs_altbank(1); |
| 314 | puts("Enabling watchdog timer on the FPGA and resetting board with values from VSPEED0, VSPEED1, VCLKH, and VCLKL to boot from the other bank ....\n"); |
| 315 | set_px_go_with_watchdog(); |
Jon Loeliger | 4d3d729 | 2006-05-31 11:24:28 -0500 | [diff] [blame] | 316 | } else |
| 317 | goto my_usage; |
| 318 | |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 319 | while(1); /* Not reached */ |
Jon Loeliger | 4d3d729 | 2006-05-31 11:24:28 -0500 | [diff] [blame] | 320 | |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 321 | } else if(argv[2][1] == 'd'){ |
| 322 | /* |
| 323 | * Reset from alternate bank without changing |
| 324 | * frequencies but with watchdog timer enabled. |
| 325 | */ |
| 326 | read_from_px_regs(0); |
| 327 | read_from_px_regs_altbank(0); |
| 328 | puts("Setting registers VCFGEN1, VBOOT, and VCTL\n"); |
| 329 | set_altbank(); |
| 330 | read_from_px_regs_altbank(1); |
| 331 | puts("Enabling watchdog timer on the FPGA and resetting board to boot from the other bank....\n"); |
| 332 | set_px_go_with_watchdog(); |
| 333 | while(1); /* Not reached */ |
Jon Loeliger | 4d3d729 | 2006-05-31 11:24:28 -0500 | [diff] [blame] | 334 | |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 335 | } else { |
| 336 | /* |
| 337 | * Reset from next bank without changing |
| 338 | * frequency and without watchdog timer enabled. |
| 339 | */ |
| 340 | read_from_px_regs(0); |
| 341 | read_from_px_regs_altbank(0); |
| 342 | if(argc > 2) |
| 343 | goto my_usage; |
| 344 | puts("Setting registers VCFGNE1, VBOOT, and VCTL\n"); |
| 345 | set_altbank(); |
| 346 | read_from_px_regs_altbank(1); |
| 347 | puts("Resetting board to boot from the other bank....\n"); |
| 348 | set_px_go(); |
Jon Loeliger | 4d3d729 | 2006-05-31 11:24:28 -0500 | [diff] [blame] | 349 | } |
| 350 | |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 351 | default: |
| 352 | goto my_usage; |
| 353 | } |
Jon Loeliger | 4d3d729 | 2006-05-31 11:24:28 -0500 | [diff] [blame] | 354 | |
Jon Loeliger | c934f65 | 2006-05-31 13:55:35 -0500 | [diff] [blame] | 355 | my_usage: |
Jon Loeliger | cb5965f | 2006-05-31 12:44:44 -0500 | [diff] [blame] | 356 | puts("\nUsage: reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>\n"); |
| 357 | puts(" reset altbank [cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>]\n"); |
| 358 | puts(" reset altbank [wd]\n"); |
| 359 | puts("For example: reset cf 40 2.5 10\n"); |
| 360 | puts("See MPC8641HPCN Design Workbook for valid values of command line parameters.\n"); |
Jon Loeliger | 4d3d729 | 2006-05-31 11:24:28 -0500 | [diff] [blame] | 361 | } |