blob: 93f29a780f56dbe216265691875477714283cdb0 [file] [log] [blame]
Jason Liu23608e22011-11-25 00:18:02 +00001/*
2 * (C) Copyright 2009
3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Jason Liu23608e22011-11-25 00:18:02 +00006 */
7
8#ifndef __ASM_ARCH_CLOCK_H
9#define __ASM_ARCH_CLOCK_H
10
Benoît Thébaudeau833b6432012-09-27 10:19:58 +000011#include <common.h>
12
13#ifdef CONFIG_SYS_MX6_HCLK
14#define MXC_HCLK CONFIG_SYS_MX6_HCLK
15#else
16#define MXC_HCLK 24000000
17#endif
18
19#ifdef CONFIG_SYS_MX6_CLK32
20#define MXC_CLK32 CONFIG_SYS_MX6_CLK32
21#else
22#define MXC_CLK32 32768
23#endif
24
Jason Liu23608e22011-11-25 00:18:02 +000025enum mxc_clock {
26 MXC_ARM_CLK = 0,
27 MXC_PER_CLK,
28 MXC_AHB_CLK,
29 MXC_IPG_CLK,
30 MXC_IPG_PERCLK,
31 MXC_UART_CLK,
32 MXC_CSPI_CLK,
33 MXC_AXI_CLK,
34 MXC_EMI_SLOW_CLK,
35 MXC_DDR_CLK,
36 MXC_ESDHC_CLK,
37 MXC_ESDHC2_CLK,
38 MXC_ESDHC3_CLK,
39 MXC_ESDHC4_CLK,
40 MXC_SATA_CLK,
41 MXC_NFC_CLK,
Matthias Weissere7bed5c2012-09-24 02:46:53 +000042 MXC_I2C_CLK,
Jason Liu23608e22011-11-25 00:18:02 +000043};
44
45u32 imx_get_uartclk(void);
46u32 imx_get_fecclk(void);
47unsigned int mxc_get_clock(enum mxc_clock clk);
Benoît Thébaudeau112fd2e2013-04-23 10:17:44 +000048void enable_ocotp_clk(unsigned char enable);
Wolfgang Grandegger3f467522012-02-08 22:33:25 +000049void enable_usboh3_clk(unsigned char enable);
Eric Nelson64e7cdb2012-03-27 09:52:21 +000050int enable_sata_clock(void);
Troy Kiskycc54a0f2012-07-19 08:18:25 +000051int enable_i2c_clk(unsigned char enable, unsigned i2c_num);
Pardeep Kumar Singla5ea7f0e2013-07-25 12:12:13 -050052void enable_ipu_clock(void);
Fabio Estevam31f07962013-09-13 00:36:28 -030053int enable_fec_anatop_clock(void);
Jason Liu23608e22011-11-25 00:18:02 +000054#endif /* __ASM_ARCH_CLOCK_H */