blob: 38599bd67d028d0f76bb8261fb924ca397d84963 [file] [log] [blame]
Stephen Warrend5ebc932012-05-15 06:45:28 +00001/dts-v1/;
2
3/include/ ARCH_CPU_DTS
4
5/ {
Allen Martin00a27492012-08-31 08:30:00 +00006 model = "NVIDIA Tegra20 Whistler evaluation board";
Stephen Warrend5ebc932012-05-15 06:45:28 +00007 compatible = "nvidia,whistler", "nvidia,tegra20";
8
9 aliases {
10 i2c0 = "/i2c@7000d000";
11 usb0 = "/usb@c5008000";
12 usb1 = "/usb@c5000000";
13 };
14
15 memory {
16 device_type = "memory";
17 reg = < 0x00000000 0x20000000 >;
18 };
19
20 clocks {
21 osc {
22 clock-frequency = <12000000>;
23 };
24 };
25
26 clock@60006000 {
27 clocks = <&clk_32k &osc>;
28 };
29
30 serial@70006000 {
31 clock-frequency = < 216000000 >;
32 };
33
34 i2c@7000c000 {
35 status = "disabled";
36 };
37
38 i2c@7000c400 {
39 status = "disabled";
40 };
41
42 i2c@7000c500 {
43 status = "disabled";
44 };
45
46 i2c@7000d000 {
47 clock-frequency = <100000>;
48
49 pmic@3c {
50 compatible = "maxim,max8907b";
51 reg = <0x3c>;
52
53 clk_32k: clock {
54 compatible = "fixed-clock";
55 /*
56 * leave out for now due to CPP:
57 * #clock-cells = <0>;
58 */
59 clock-frequency = <32768>;
60 };
61 };
62 };
63
64 usb@c5004000 {
65 status = "disabled";
66 };
67};