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Hannes Petermaier072cefe2014-02-07 14:06:50 +01001/*
2 * board.c
3 *
4 * Board functions for B&R KWB Board
5 *
6 * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at>
7 * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 *
11 */
12#include <common.h>
13#include <errno.h>
14#include <spl.h>
15#include <asm/arch/cpu.h>
16#include <asm/arch/hardware.h>
17#include <asm/arch/omap.h>
18#include <asm/arch/ddr_defs.h>
19#include <asm/arch/clock.h>
20#include <asm/arch/gpio.h>
21#include <asm/arch/sys_proto.h>
22#include <asm/arch/mem.h>
23#include <asm/io.h>
24#include <asm/emif.h>
25#include <asm/gpio.h>
26#include <i2c.h>
27#include <power/tps65217.h>
28#include "../common/bur_common.h"
Hannes Petermaiercf630f22015-02-03 13:22:39 +010029#include <lcd.h>
Hannes Petermaier072cefe2014-02-07 14:06:50 +010030
31/* -------------------------------------------------------------------------*/
32/* -- defines for used GPIO Hardware -- */
Hannes Petermaiercf630f22015-02-03 13:22:39 +010033#define ESC_KEY (0+19)
34#define LCD_PWR (0+5)
35#define PUSH_KEY (0+31)
Hannes Petermaier072cefe2014-02-07 14:06:50 +010036/* -------------------------------------------------------------------------*/
37/* -- PSOC Resetcontroller Register defines -- */
38
39/* I2C Address of controller */
40#define RSTCTRL_ADDR 0x75
41/* Register for CTRL-word */
42#define RSTCTRL_CTRLREG 0x01
43/* Register for giving some information to VxWorks OS */
44#define RSTCTRL_SCRATCHREG 0x04
45
46/* -- defines for RSTCTRL_CTRLREG -- */
47#define RSTCTRL_FORCE_PWR_NEN 0x0404
Hannes Petermaiercf630f22015-02-03 13:22:39 +010048#define RSTCTRL_CAN_STB 0x4040
Hannes Petermaier072cefe2014-02-07 14:06:50 +010049
Hannes Petermaiera9642922015-02-03 13:22:42 +010050#define VXWORKS_BOOTLINE 0x80001100
51#define DEFAULT_BOOTLINE "cpsw(0,0):pme/vxWorks"
52#define VXWORKS_USER "u=vxWorksFTP pw=vxWorks tn=vxtarget"
53
54DECLARE_GLOBAL_DATA_PTR;
55
Hannes Petermaier072cefe2014-02-07 14:06:50 +010056#if defined(CONFIG_SPL_BUILD)
57/* TODO: check ram-timing ! */
58static const struct ddr_data ddr3_data = {
59 .datardsratio0 = MT41K256M16HA125E_RD_DQS,
60 .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
61 .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
62 .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
63};
64static const struct cmd_control ddr3_cmd_ctrl_data = {
65 .cmd0csratio = MT41K256M16HA125E_RATIO,
66 .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
67
68 .cmd1csratio = MT41K256M16HA125E_RATIO,
69 .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
70
71 .cmd2csratio = MT41K256M16HA125E_RATIO,
72 .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
73};
74static struct emif_regs ddr3_emif_reg_data = {
75 .sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
76 .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF,
77 .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1,
78 .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2,
79 .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3,
80 .zq_config = MT41K256M16HA125E_ZQ_CFG,
81 .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
82};
83
84static const struct ctrl_ioregs ddr3_ioregs = {
85 .cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
86 .cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
87 .cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
88 .dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
89 .dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
90};
91
92#define OSC (V_OSCK/1000000)
93const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1};
94
95void am33xx_spl_board_init(void)
96{
97 unsigned int oldspeed;
98 unsigned short buf;
99
100 struct cm_perpll *const cmper = (struct cm_perpll *)CM_PER;
101 struct cm_wkuppll *const cmwkup = (struct cm_wkuppll *)CM_WKUP;
102 /*
103 * enable additional clocks of modules which are accessed later from
104 * VxWorks OS
105 */
106 u32 *const clk_domains[] = { 0 };
107
108 u32 *const clk_modules_kwbspecific[] = {
109 &cmwkup->wkup_adctscctrl,
110 &cmper->spi1clkctrl,
111 &cmper->dcan0clkctrl,
112 &cmper->dcan1clkctrl,
113 &cmper->epwmss0clkctrl,
114 &cmper->epwmss1clkctrl,
115 &cmper->epwmss2clkctrl,
Hannes Petermaiercf630f22015-02-03 13:22:39 +0100116 &cmper->lcdclkctrl,
117 &cmper->lcdcclkstctrl,
Hannes Petermaier072cefe2014-02-07 14:06:50 +0100118 0
119 };
120 do_enable_clocks(clk_domains, clk_modules_kwbspecific, 1);
Hannes Petermaiercf630f22015-02-03 13:22:39 +0100121 /* setup LCD-Pixel Clock */
122 writel(0x2, CM_DPLL + 0x34);
Hannes Petermaier072cefe2014-02-07 14:06:50 +0100123 /* power-OFF LCD-Display */
124 gpio_direction_output(LCD_PWR, 0);
125
126 /* setup I2C */
Hannes Petermaier2b5b2be2015-03-19 10:43:15 +0100127 enable_i2c_pin_mux();
128 i2c_set_bus_num(0);
Hannes Petermaier072cefe2014-02-07 14:06:50 +0100129 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
130
131 /* power-ON 3V3 via Resetcontroller */
132 oldspeed = i2c_get_bus_speed();
Hannes Petermaieraadf3192014-03-08 19:09:32 +0100133 if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) {
Hannes Petermaiercf630f22015-02-03 13:22:39 +0100134 buf = RSTCTRL_FORCE_PWR_NEN | RSTCTRL_CAN_STB;
Hannes Petermaier072cefe2014-02-07 14:06:50 +0100135 i2c_write(RSTCTRL_ADDR, RSTCTRL_CTRLREG, 1,
136 (uint8_t *)&buf, sizeof(buf));
137 i2c_set_bus_speed(oldspeed);
138 } else {
139 puts("ERROR: i2c_set_bus_speed failed! (turn on PWR_nEN)\n");
140 }
141
Hannes Petermaier072cefe2014-02-07 14:06:50 +0100142 pmicsetup(0);
143}
144
145const struct dpll_params *get_dpll_ddr_params(void)
146{
147 return &dpll_ddr3;
148}
149
150void sdram_init(void)
151{
152 config_ddr(400, &ddr3_ioregs,
153 &ddr3_data,
154 &ddr3_cmd_ctrl_data,
155 &ddr3_emif_reg_data, 0);
156}
157#endif /* CONFIG_SPL_BUILD */
158/*
159 * Basic board specific setup. Pinmux has been handled already.
160 */
161int board_init(void)
162{
163 gpmc_init();
164 return 0;
165}
166
167#ifdef CONFIG_BOARD_LATE_INIT
168int board_late_init(void)
169{
Hannes Petermaier072cefe2014-02-07 14:06:50 +0100170 const unsigned int toff = 1000;
171 unsigned int cnt = 3;
172 unsigned short buf = 0xAAAA;
Hannes Petermaier8db622c2015-02-03 13:22:43 +0100173 unsigned char scratchreg = 0;
Hannes Petermaier072cefe2014-02-07 14:06:50 +0100174 unsigned int oldspeed;
175
Hannes Petermaier8db622c2015-02-03 13:22:43 +0100176 /* try to read out some boot-instruction from resetcontroller */
177 oldspeed = i2c_get_bus_speed();
178 if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) {
179 i2c_read(RSTCTRL_ADDR, RSTCTRL_SCRATCHREG, 1,
180 &scratchreg, sizeof(scratchreg));
181 i2c_set_bus_speed(oldspeed);
182 } else {
183 puts("ERROR: i2c_set_bus_speed failed! (scratchregister)\n");
184 }
Hannes Petermaier072cefe2014-02-07 14:06:50 +0100185
Hannes Petermaiercf630f22015-02-03 13:22:39 +0100186 if (gpio_get_value(ESC_KEY)) {
Hannes Petermaier072cefe2014-02-07 14:06:50 +0100187 do {
Hannes Petermaiercf630f22015-02-03 13:22:39 +0100188 lcd_position_cursor(1, 8);
189 switch (cnt) {
190 case 3:
191 lcd_puts(
192 "release ESC-KEY to enter SERVICE-mode.");
193 break;
194 case 2:
195 lcd_puts(
196 "release ESC-KEY to enter DIAGNOSE-mode.");
197 break;
198 case 1:
199 lcd_puts(
200 "release ESC-KEY to enter BOOT-mode. ");
201 break;
202 }
Hannes Petermaier072cefe2014-02-07 14:06:50 +0100203 mdelay(toff);
204 cnt--;
Hannes Petermaiercf630f22015-02-03 13:22:39 +0100205 if (!gpio_get_value(ESC_KEY) &&
206 gpio_get_value(PUSH_KEY) && 2 == cnt) {
207 lcd_position_cursor(1, 8);
208 lcd_puts(
209 "switching to network-console ... ");
210 setenv("bootcmd", "run netconsole");
211 cnt = 4;
Hannes Petermaier072cefe2014-02-07 14:06:50 +0100212 break;
Hannes Petermaiercf630f22015-02-03 13:22:39 +0100213 } else if (!gpio_get_value(ESC_KEY) &&
214 gpio_get_value(PUSH_KEY) && 1 == cnt) {
215 lcd_position_cursor(1, 8);
216 lcd_puts(
217 "updating U-BOOT from USB ... ");
218 setenv("bootcmd", "run usbupdate");
219 cnt = 4;
220 break;
221 } else if ((!gpio_get_value(ESC_KEY) &&
222 gpio_get_value(PUSH_KEY) && cnt == 0) ||
223 (gpio_get_value(ESC_KEY) &&
224 gpio_get_value(PUSH_KEY) && cnt == 0)) {
225 lcd_position_cursor(1, 8);
226 lcd_puts(
227 "starting script from network ... ");
228 setenv("bootcmd", "run netscript");
229 cnt = 4;
230 break;
231 } else if (!gpio_get_value(ESC_KEY)) {
Hannes Petermaier072cefe2014-02-07 14:06:50 +0100232 break;
233 }
234 } while (cnt);
Hannes Petermaier8db622c2015-02-03 13:22:43 +0100235 } else if (scratchreg == 0xCC) {
236 lcd_position_cursor(1, 8);
237 lcd_puts(
238 "starting vxworks from network ... ");
239 setenv("bootcmd", "run netboot");
240 cnt = 4;
241 } else if (scratchreg == 0xCD) {
242 lcd_position_cursor(1, 8);
243 lcd_puts(
244 "starting script from network ... ");
245 setenv("bootcmd", "run netscript");
246 cnt = 4;
247 } else if (scratchreg == 0xCE) {
248 lcd_position_cursor(1, 8);
249 lcd_puts(
250 "starting AR from eMMC ... ");
251 setenv("bootcmd", "run mmcboot");
252 cnt = 4;
Hannes Petermaier072cefe2014-02-07 14:06:50 +0100253 }
254
Hannes Petermaiercf630f22015-02-03 13:22:39 +0100255 lcd_position_cursor(1, 8);
Hannes Petermaier072cefe2014-02-07 14:06:50 +0100256 switch (cnt) {
257 case 0:
Hannes Petermaiercf630f22015-02-03 13:22:39 +0100258 lcd_puts("entering BOOT-mode. ");
259 setenv("bootcmd", "run defaultAR");
Hannes Petermaier072cefe2014-02-07 14:06:50 +0100260 buf = 0x0000;
261 break;
262 case 1:
Hannes Petermaiercf630f22015-02-03 13:22:39 +0100263 lcd_puts("entering DIAGNOSE-mode. ");
Hannes Petermaier072cefe2014-02-07 14:06:50 +0100264 buf = 0x0F0F;
265 break;
266 case 2:
Hannes Petermaiercf630f22015-02-03 13:22:39 +0100267 lcd_puts("entering SERVICE mode. ");
Hannes Petermaier072cefe2014-02-07 14:06:50 +0100268 buf = 0xB4B4;
269 break;
270 case 3:
Hannes Petermaiercf630f22015-02-03 13:22:39 +0100271 lcd_puts("loading OS... ");
Hannes Petermaier072cefe2014-02-07 14:06:50 +0100272 buf = 0x0404;
273 break;
274 }
Hannes Petermaier072cefe2014-02-07 14:06:50 +0100275 /* write bootinfo into scratchregister of resetcontroller */
276 oldspeed = i2c_get_bus_speed();
Hannes Petermaieraadf3192014-03-08 19:09:32 +0100277 if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) {
Hannes Petermaier072cefe2014-02-07 14:06:50 +0100278 i2c_write(RSTCTRL_ADDR, RSTCTRL_SCRATCHREG, 1,
279 (uint8_t *)&buf, sizeof(buf));
280 i2c_set_bus_speed(oldspeed);
281 } else {
282 puts("ERROR: i2c_set_bus_speed failed! (scratchregister)\n");
283 }
Hannes Petermaiera9642922015-02-03 13:22:42 +0100284 /* setup vxworks bootline */
285 char *vxworksbootline = (char *)VXWORKS_BOOTLINE;
286
287 /* setup default IP, in case if there is nothing in environment */
288 if (!getenv("ipaddr")) {
289 setenv("ipaddr", "192.168.60.1");
290 setenv("netmask", "255.255.255.0");
291 setenv("serverip", "192.168.60.254");
292 setenv("gatewayip", "192.168.60.254");
293 puts("net: had no IP! made default setup.\n");
294 }
295
296 sprintf(vxworksbootline,
297 "%s h=%s e=%s:%s g=%s %s o=0x%08x;0x%08x;0x%08x;0x%08x",
298 DEFAULT_BOOTLINE,
299 getenv("serverip"),
300 getenv("ipaddr"), getenv("netmask"),
301 getenv("gatewayip"),
302 VXWORKS_USER,
303 (unsigned int) gd->fb_base-0x20,
304 (u32)getenv_ulong("vx_memtop", 16, gd->fb_base-0x20),
305 (u32)getenv_ulong("vx_romfsbase", 16, 0),
306 (u32)getenv_ulong("vx_romfssize", 16, 0));
307
Hannes Petermaier072cefe2014-02-07 14:06:50 +0100308 /*
309 * reset VBAR registers to its reset location, VxWorks 6.9.3.2 does
310 * expect that vectors are there, original u-boot moves them to _start
311 */
312 __asm__("ldr r0,=0x20000");
313 __asm__("mcr p15, 0, r0, c12, c0, 0"); /* Set VBAR */
314
315 return 0;
316}
317#endif /* CONFIG_BOARD_LATE_INIT */