blob: 67e706b3cbbb451120b4f1f2d9ef3e659333b0b9 [file] [log] [blame]
wdenk2e5983d2003-07-15 20:04:06 +00001/*
2 * armboot - Startup Code for ARM925 CPU-core
3 *
4 * Copyright (c) 2003 Texas Instruments
5 *
6 * ----- Adapted for OMAP1510 from ARM920 code ------
7 *
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
Detlev Zundel792a09e2009-05-13 10:54:10 +020010 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
wdenk2e5983d2003-07-15 20:04:06 +000011 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
Wolfgang Denk53677ef2008-05-20 16:00:29 +020012 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
wdenk2e5983d2003-07-15 20:04:06 +000013 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 */
32
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +020033#include <asm-offsets.h>
wdenk2e5983d2003-07-15 20:04:06 +000034#include <config.h>
35#include <version.h>
36
37#if defined(CONFIG_OMAP1510)
38#include <./configs/omap1510.h>
39#endif
40
41/*
42 *************************************************************************
43 *
44 * Jump vector table as in table 3.1 in [1]
45 *
46 *************************************************************************
47 */
48
49
50.globl _start
51_start: b reset
52 ldr pc, _undefined_instruction
53 ldr pc, _software_interrupt
54 ldr pc, _prefetch_abort
55 ldr pc, _data_abort
56 ldr pc, _not_used
57 ldr pc, _irq
58 ldr pc, _fiq
59
60_undefined_instruction: .word undefined_instruction
61_software_interrupt: .word software_interrupt
62_prefetch_abort: .word prefetch_abort
63_data_abort: .word data_abort
64_not_used: .word not_used
65_irq: .word irq
66_fiq: .word fiq
67
68 .balignl 16,0xdeadbeef
69
70
71/*
72 *************************************************************************
73 *
74 * Startup Code (reset vector)
75 *
76 * do important init only if we don't start from memory!
77 * setup Memory and board specific bits prior to relocation.
78 * relocate armboot to ram
79 * setup stack
80 *
81 *************************************************************************
82 */
83
Heiko Schocher405d0232010-09-17 13:10:44 +020084.globl _TEXT_BASE
wdenk2e5983d2003-07-15 20:04:06 +000085_TEXT_BASE:
Wolfgang Denk14d0a022010-10-07 21:51:12 +020086 .word CONFIG_SYS_TEXT_BASE
wdenk2e5983d2003-07-15 20:04:06 +000087
wdenk2e5983d2003-07-15 20:04:06 +000088/*
wdenkf6e20fc2004-02-08 19:38:38 +000089 * These are defined in the board-specific linker script.
Albert Aribaud3336ca62010-11-25 22:45:02 +010090 * Subtracting _start from them lets the linker put their
91 * relative position in the executable instead of leaving
92 * them null.
wdenk2e5983d2003-07-15 20:04:06 +000093 */
Albert Aribaud3336ca62010-11-25 22:45:02 +010094.globl _bss_start_ofs
95_bss_start_ofs:
96 .word __bss_start - _start
wdenkf6e20fc2004-02-08 19:38:38 +000097
Albert Aribaud3336ca62010-11-25 22:45:02 +010098.globl _bss_end_ofs
99_bss_end_ofs:
100 .word _end - _start
wdenk2e5983d2003-07-15 20:04:06 +0000101
wdenk2e5983d2003-07-15 20:04:06 +0000102#ifdef CONFIG_USE_IRQ
103/* IRQ stack memory (calculated at run-time) */
104.globl IRQ_STACK_START
105IRQ_STACK_START:
106 .word 0x0badc0de
107
108/* IRQ stack memory (calculated at run-time) */
109.globl FIQ_STACK_START
110FIQ_STACK_START:
111 .word 0x0badc0de
112#endif
113
Heiko Schocher405d0232010-09-17 13:10:44 +0200114/* IRQ stack memory (calculated at run-time) + 8 bytes */
115.globl IRQ_STACK_START_IN
116IRQ_STACK_START_IN:
117 .word 0x0badc0de
wdenk2e5983d2003-07-15 20:04:06 +0000118
Heiko Schocher405d0232010-09-17 13:10:44 +0200119/*
120 * the actual reset code
121 */
122
123reset:
124 /*
125 * set the cpu to SVC32 mode
126 */
127 mrs r0,cpsr
128 bic r0,r0,#0x1f
129 orr r0,r0,#0xd3
130 msr cpsr,r0
131
132 /*
133 * Set up 925T mode
134 */
135 mov r1, #0x81 /* Set ARM925T configuration. */
136 mcr p15, 0, r1, c15, c1, 0 /* Write ARM925T configuration register. */
137
138 /*
139 * turn off the watchdog, unlock/diable sequence
140 */
141 mov r1, #0xF5
142 ldr r0, =WDTIM_MODE
143 strh r1, [r0]
144 mov r1, #0xA0
145 strh r1, [r0]
146
147 /*
148 * mask all IRQs by setting all bits in the INTMR - default
149 */
150 mov r1, #0xffffffff
151 ldr r0, =REG_IHL1_MIR
152 str r1, [r0]
153 ldr r0, =REG_IHL2_MIR
154 str r1, [r0]
155
156 /*
157 * wait for dpll to lock
158 */
159 ldr r0, =CK_DPLL1
160 mov r1, #0x10
161 strh r1, [r0]
162poll1:
163 ldrh r1, [r0]
164 ands r1, r1, #0x01
165 beq poll1
166
167 /*
168 * we do sys-critical inits only at reboot,
169 * not when booting from ram!
170 */
171#ifndef CONFIG_SKIP_LOWLEVEL_INIT
172 bl cpu_init_crit
173#endif
174
175/* Set stackpointer in internal RAM to call board_init_f */
176call_board_init_f:
177 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
Heiko Schocher296cae72010-11-12 07:53:55 +0100178 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
Heiko Schocher405d0232010-09-17 13:10:44 +0200179 ldr r0,=0x00000000
180 bl board_init_f
181
182/*------------------------------------------------------------------------------*/
183
184/*
185 * void relocate_code (addr_sp, gd, addr_moni)
186 *
187 * This "function" does not return, instead it continues in RAM
188 * after relocating the monitor code.
189 *
190 */
191 .globl relocate_code
192relocate_code:
193 mov r4, r0 /* save addr_sp */
194 mov r5, r1 /* save addr of gd */
195 mov r6, r2 /* save addr of destination */
Heiko Schocher405d0232010-09-17 13:10:44 +0200196
197 /* Set up the stack */
198stack_setup:
199 mov sp, r4
200
201 adr r0, _start
Andreas Bießmanna1a47d32010-12-01 00:58:34 +0100202 cmp r0, r6
203 beq clear_bss /* skip relocation */
Andreas Bießmanna78fb682010-12-01 00:58:33 +0100204 mov r1, r6 /* r1 <- scratch for copy_loop */
Heiko Schocher405d0232010-09-17 13:10:44 +0200205 ldr r2, _TEXT_BASE
Albert Aribaud3336ca62010-11-25 22:45:02 +0100206 ldr r3, _bss_start_ofs
207 add r2, r0, r3 /* r2 <- source end address */
Heiko Schocher405d0232010-09-17 13:10:44 +0200208
Heiko Schocher405d0232010-09-17 13:10:44 +0200209copy_loop:
210 ldmia r0!, {r9-r10} /* copy from source address [r0] */
Andreas Bießmanna78fb682010-12-01 00:58:33 +0100211 stmia r1!, {r9-r10} /* copy to target address [r1] */
Albert Aribaudda90d4c2010-10-05 16:06:39 +0200212 cmp r0, r2 /* until source end address [r2] */
213 blo copy_loop
Heiko Schocher405d0232010-09-17 13:10:44 +0200214
215#ifndef CONFIG_PRELOADER
Albert Aribaud3336ca62010-11-25 22:45:02 +0100216 /*
217 * fix .rel.dyn relocations
218 */
219 ldr r0, _TEXT_BASE /* r0 <- Text base */
Andreas Bießmanna78fb682010-12-01 00:58:33 +0100220 sub r9, r6, r0 /* r9 <- relocation offset */
Albert Aribaud3336ca62010-11-25 22:45:02 +0100221 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
222 add r10, r10, r0 /* r10 <- sym table in FLASH */
223 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
224 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
225 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
226 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
Heiko Schocher405d0232010-09-17 13:10:44 +0200227fixloop:
Albert Aribaud3336ca62010-11-25 22:45:02 +0100228 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
229 add r0, r0, r9 /* r0 <- location to fix up in RAM */
230 ldr r1, [r2, #4]
Andreas Bießmann1f52d892010-12-01 00:58:35 +0100231 and r7, r1, #0xff
232 cmp r7, #23 /* relative fixup? */
Albert Aribaud3336ca62010-11-25 22:45:02 +0100233 beq fixrel
Andreas Bießmann1f52d892010-12-01 00:58:35 +0100234 cmp r7, #2 /* absolute fixup? */
Albert Aribaud3336ca62010-11-25 22:45:02 +0100235 beq fixabs
236 /* ignore unknown type of fixup */
237 b fixnext
238fixabs:
239 /* absolute fix: set location to (offset) symbol value */
240 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
241 add r1, r10, r1 /* r1 <- address of symbol in table */
242 ldr r1, [r1, #4] /* r1 <- symbol value */
243 add r1, r9 /* r1 <- relocated sym addr */
244 b fixnext
245fixrel:
246 /* relative fix: increase location by offset */
247 ldr r1, [r0]
248 add r1, r1, r9
249fixnext:
250 str r1, [r0]
251 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
Heiko Schocher405d0232010-09-17 13:10:44 +0200252 cmp r2, r3
Wolfgang Denk79e63132010-10-23 23:22:38 +0200253 blo fixloop
Heiko Schocher405d0232010-09-17 13:10:44 +0200254#endif
Heiko Schocher405d0232010-09-17 13:10:44 +0200255
256clear_bss:
257#ifndef CONFIG_PRELOADER
Albert Aribaud3336ca62010-11-25 22:45:02 +0100258 ldr r0, _bss_start_ofs
259 ldr r1, _bss_end_ofs
Heiko Schocher405d0232010-09-17 13:10:44 +0200260 ldr r3, _TEXT_BASE /* Text base */
Andreas Bießmanna78fb682010-12-01 00:58:33 +0100261 mov r4, r6 /* reloc addr */
Heiko Schocher405d0232010-09-17 13:10:44 +0200262 add r0, r0, r4
Heiko Schocher405d0232010-09-17 13:10:44 +0200263 add r1, r1, r4
264 mov r2, #0x00000000 /* clear */
265
266clbss_l:str r2, [r0] /* clear loop... */
267 add r0, r0, #4
268 cmp r0, r1
269 bne clbss_l
270
Albert Aribaud3336ca62010-11-25 22:45:02 +0100271 bl coloured_LED_init
272 bl red_LED_on
Heiko Schocher405d0232010-09-17 13:10:44 +0200273#endif
274
275/*
276 * We are done. Do not return, instead branch to second part of board
277 * initialization, now running from RAM.
278 */
279#ifdef CONFIG_NAND_SPL
Albert Aribaud3336ca62010-11-25 22:45:02 +0100280 ldr r0, _nand_boot_ofs
281 mov pc, r0
Heiko Schocher405d0232010-09-17 13:10:44 +0200282
Albert Aribaud3336ca62010-11-25 22:45:02 +0100283_nand_boot_ofs:
284 .word nand_boot
Heiko Schocher405d0232010-09-17 13:10:44 +0200285#else
Albert Aribaud3336ca62010-11-25 22:45:02 +0100286 ldr r0, _board_init_r_ofs
287 adr r1, _start
288 add lr, r0, r1
289 add lr, lr, r9
Heiko Schocher405d0232010-09-17 13:10:44 +0200290 /* setup parameters for board_init_r */
291 mov r0, r5 /* gd_t */
Andreas Bießmanna78fb682010-12-01 00:58:33 +0100292 mov r1, r6 /* dest_addr */
Heiko Schocher405d0232010-09-17 13:10:44 +0200293 /* jump to it ... */
Heiko Schocher405d0232010-09-17 13:10:44 +0200294 mov pc, lr
295
Albert Aribaud3336ca62010-11-25 22:45:02 +0100296_board_init_r_ofs:
297 .word board_init_r - _start
Heiko Schocher405d0232010-09-17 13:10:44 +0200298#endif
299
Albert Aribaud3336ca62010-11-25 22:45:02 +0100300_rel_dyn_start_ofs:
301 .word __rel_dyn_start - _start
302_rel_dyn_end_ofs:
303 .word __rel_dyn_end - _start
304_dynsym_start_ofs:
305 .word __dynsym_start - _start
306
wdenk2e5983d2003-07-15 20:04:06 +0000307/*
308 *************************************************************************
309 *
310 * CPU_init_critical registers
311 *
312 * setup important registers
313 * setup memory timing
314 *
315 *************************************************************************
316 */
317
318
319cpu_init_crit:
320 /*
321 * flush v4 I/D caches
322 */
323 mov r0, #0
324 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
325 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
326
327 /*
328 * disable MMU stuff and caches
329 */
330 mrc p15, 0, r0, c1, c0, 0
331 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
332 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
333 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
334 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
335 mcr p15, 0, r0, c1, c0, 0
336
337 /*
338 * Go setup Memory and board specific bits prior to relocation.
339 */
340 mov ip, lr /* perserve link reg across call */
Wolfgang Denk87cb6862005-10-06 17:08:18 +0200341 bl lowlevel_init /* go setup pll,mux,memory */
wdenk2e5983d2003-07-15 20:04:06 +0000342 mov lr, ip /* restore link */
343 mov pc, lr /* back to my caller */
344/*
345 *************************************************************************
346 *
347 * Interrupt handling
348 *
349 *************************************************************************
350 */
351
352@
353@ IRQ stack frame.
354@
355#define S_FRAME_SIZE 72
356
357#define S_OLD_R0 68
358#define S_PSR 64
359#define S_PC 60
360#define S_LR 56
361#define S_SP 52
362
363#define S_IP 48
364#define S_FP 44
365#define S_R10 40
366#define S_R9 36
367#define S_R8 32
368#define S_R7 28
369#define S_R6 24
370#define S_R5 20
371#define S_R4 16
372#define S_R3 12
373#define S_R2 8
374#define S_R1 4
375#define S_R0 0
376
377#define MODE_SVC 0x13
378#define I_BIT 0x80
379
380/*
381 * use bad_save_user_regs for abort/prefetch/undef/swi ...
382 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
383 */
384
385 .macro bad_save_user_regs
386 sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
387 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
388
Heiko Schocher405d0232010-09-17 13:10:44 +0200389 ldr r2, IRQ_STACK_START_IN
wdenk2e5983d2003-07-15 20:04:06 +0000390 ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
391 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
392
393 add r5, sp, #S_SP
394 mov r1, lr
395 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
396 mov r0, sp @ save current stack into r0 (param register)
397 .endm
398
399 .macro irq_save_user_regs
400 sub sp, sp, #S_FRAME_SIZE
401 stmia sp, {r0 - r12} @ Calling r0-r12
402 add r8, sp, #S_PC @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
403 stmdb r8, {sp, lr}^ @ Calling SP, LR
404 str lr, [r8, #0] @ Save calling PC
405 mrs r6, spsr
406 str r6, [r8, #4] @ Save CPSR
407 str r0, [r8, #8] @ Save OLD_R0
408 mov r0, sp
409 .endm
410
411 .macro irq_restore_user_regs
412 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
413 mov r0, r0
414 ldr lr, [sp, #S_PC] @ Get PC
415 add sp, sp, #S_FRAME_SIZE
416 subs pc, lr, #4 @ return & move spsr_svc into cpsr
417 .endm
418
419 .macro get_bad_stack
Heiko Schocher405d0232010-09-17 13:10:44 +0200420 ldr r13, IRQ_STACK_START_IN
wdenk2e5983d2003-07-15 20:04:06 +0000421
422 str lr, [r13] @ save caller lr in position 0 of saved stack
423 mrs lr, spsr @ get the spsr
424 str lr, [r13, #4] @ save spsr in position 1 of saved stack
425
426 mov r13, #MODE_SVC @ prepare SVC-Mode
427 @ msr spsr_c, r13
428 msr spsr, r13 @ switch modes, make sure moves will execute
429 mov lr, pc @ capture return pc
430 movs pc, lr @ jump to next instruction & switch modes.
431 .endm
432
433 .macro get_irq_stack @ setup IRQ stack
434 ldr sp, IRQ_STACK_START
435 .endm
436
437 .macro get_fiq_stack @ setup FIQ stack
438 ldr sp, FIQ_STACK_START
439 .endm
440
441/*
442 * exception handlers
443 */
444 .align 5
445undefined_instruction:
446 get_bad_stack
447 bad_save_user_regs
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200448 bl do_undefined_instruction
wdenk2e5983d2003-07-15 20:04:06 +0000449
450 .align 5
451software_interrupt:
452 get_bad_stack
453 bad_save_user_regs
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200454 bl do_software_interrupt
wdenk2e5983d2003-07-15 20:04:06 +0000455
456 .align 5
457prefetch_abort:
458 get_bad_stack
459 bad_save_user_regs
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200460 bl do_prefetch_abort
wdenk2e5983d2003-07-15 20:04:06 +0000461
462 .align 5
463data_abort:
464 get_bad_stack
465 bad_save_user_regs
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200466 bl do_data_abort
wdenk2e5983d2003-07-15 20:04:06 +0000467
468 .align 5
469not_used:
470 get_bad_stack
471 bad_save_user_regs
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200472 bl do_not_used
wdenk2e5983d2003-07-15 20:04:06 +0000473
474#ifdef CONFIG_USE_IRQ
475
476 .align 5
477irq:
478 get_irq_stack
479 irq_save_user_regs
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200480 bl do_irq
wdenk2e5983d2003-07-15 20:04:06 +0000481 irq_restore_user_regs
482
483 .align 5
484fiq:
485 get_fiq_stack
486 /* someone ought to write a more effiction fiq_save_user_regs */
487 irq_save_user_regs
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200488 bl do_fiq
wdenk2e5983d2003-07-15 20:04:06 +0000489 irq_restore_user_regs
490
491#else
492
493 .align 5
494irq:
495 get_bad_stack
496 bad_save_user_regs
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200497 bl do_irq
wdenk2e5983d2003-07-15 20:04:06 +0000498
499 .align 5
500fiq:
501 get_bad_stack
502 bad_save_user_regs
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200503 bl do_fiq
wdenk2e5983d2003-07-15 20:04:06 +0000504
505#endif
506
507 .align 5
508.globl reset_cpu
509reset_cpu:
510 ldr r1, rstctl1 /* get clkm1 reset ctl */
wdenk1f4bb372003-07-27 00:21:01 +0000511 mov r3, #0x3 /* dsp_en + arm_rst = global reset */
512 strh r3, [r1] /* force reset */
513 mov r0, r0
wdenk2e5983d2003-07-15 20:04:06 +0000514_loop_forever:
515 b _loop_forever
516rstctl1:
517 .word 0xfffece10