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Bin Meng4372c112017-04-21 07:24:28 -07001/*
2 * Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef __ASM_ACPI_S3_H__
8#define __ASM_ACPI_S3_H__
9
10/* PM1_STATUS register */
11#define WAK_STS (1 << 15)
12#define PCIEXPWAK_STS (1 << 14)
13#define RTC_STS (1 << 10)
14#define SLPBTN_STS (1 << 9)
15#define PWRBTN_STS (1 << 8)
16#define GBL_STS (1 << 5)
17#define BM_STS (1 << 4)
18#define TMR_STS (1 << 0)
19
20/* PM1_CNT register */
21#define SLP_EN (1 << 13)
22#define SLP_TYP_SHIFT 10
23#define SLP_TYP (7 << SLP_TYP_SHIFT)
24#define SLP_TYP_S0 0
25#define SLP_TYP_S1 1
26#define SLP_TYP_S3 5
27#define SLP_TYP_S4 6
28#define SLP_TYP_S5 7
29
30enum acpi_sleep_state {
31 ACPI_S0,
32 ACPI_S1,
33 ACPI_S2,
34 ACPI_S3,
35 ACPI_S4,
36 ACPI_S5,
37};
38
39/**
Bin Mengb7279612017-04-21 07:24:32 -070040 * acpi_ss_string() - get ACPI-defined sleep state string
41 *
42 * @pm1_cnt: ACPI-defined sleep state
43 * @return: a pointer to the sleep state string.
44 */
45static inline char *acpi_ss_string(enum acpi_sleep_state state)
46{
47 char *ss_string[] = { "S0", "S1", "S2", "S3", "S4", "S5"};
48
49 return ss_string[state];
50}
51
52/**
Bin Meng4372c112017-04-21 07:24:28 -070053 * acpi_sleep_from_pm1() - get ACPI-defined sleep state from PM1_CNT register
54 *
55 * @pm1_cnt: PM1_CNT register value
56 * @return: ACPI-defined sleep state if given valid PM1_CNT register value,
57 * -EINVAL otherwise.
58 */
59static inline enum acpi_sleep_state acpi_sleep_from_pm1(u32 pm1_cnt)
60{
61 switch ((pm1_cnt & SLP_TYP) >> SLP_TYP_SHIFT) {
62 case SLP_TYP_S0:
63 return ACPI_S0;
64 case SLP_TYP_S1:
65 return ACPI_S1;
66 case SLP_TYP_S3:
67 return ACPI_S3;
68 case SLP_TYP_S4:
69 return ACPI_S4;
70 case SLP_TYP_S5:
71 return ACPI_S5;
72 }
73
74 return -EINVAL;
75}
76
Bin Meng12067232017-04-21 07:24:31 -070077/**
78 * chipset_prev_sleep_state() - Get chipset previous sleep state
79 *
80 * This returns chipset previous sleep state from ACPI registers.
81 * Platform codes must supply this routine in order to support ACPI S3.
82 *
83 * @return ACPI_S0/S1/S2/S3/S4/S5.
84 */
85enum acpi_sleep_state chipset_prev_sleep_state(void);
86
87/**
88 * chipset_clear_sleep_state() - Clear chipset sleep state
89 *
90 * This clears chipset sleep state in ACPI registers.
91 * Platform codes must supply this routine in order to support ACPI S3.
92 */
93void chipset_clear_sleep_state(void);
94
Bin Meng4372c112017-04-21 07:24:28 -070095#endif /* __ASM_ACPI_S3_H__ */