Blame - arch/mips/Kconfig - github/trini/u-boot

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Masahiro Yamada	dd84058	2014-07-30 14:08:14 +0900	[diff] [blame]	1	menu "MIPS architecture"
				2	depends on MIPS
				3
				4	config SYS_ARCH
Masahiro Yamada	dd84058	2014-07-30 14:08:14 +0900	[diff] [blame]	5	default "mips"
				6
Daniel Schwierzeck	b9863b6	2014-10-26 14:14:07 +0100	[diff] [blame]	7	config SYS_CPU
				8	default "mips32" if CPU_MIPS32_R1 \|\| CPU_MIPS32_R2
				9	default "mips64" if CPU_MIPS64_R1 \|\| CPU_MIPS64_R2
				10
Masahiro Yamada	dd84058	2014-07-30 14:08:14 +0900	[diff] [blame]	11	choice
				12	prompt "Target select"
Joe Hershberger	a26cd04	2015-05-12 14:46:23 -0500	[diff] [blame]	13	optional
Masahiro Yamada	dd84058	2014-07-30 14:08:14 +0900	[diff] [blame]	14
				15	config TARGET_QEMU_MIPS
				16	bool "Support qemu-mips"
Daniel Schwierzeck	0e1dc34	2014-10-26 14:14:07 +0100	[diff] [blame]	17	select SUPPORTS_BIG_ENDIAN
				18	select SUPPORTS_LITTLE_ENDIAN
Daniel Schwierzeck	02611cb	2014-10-26 14:14:07 +0100	[diff] [blame]	19	select SUPPORTS_CPU_MIPS32_R1
				20	select SUPPORTS_CPU_MIPS32_R2
Daniel Schwierzeck	aa45f75	2014-10-26 14:14:07 +0100	[diff] [blame]	21	select SUPPORTS_CPU_MIPS64_R1
				22	select SUPPORTS_CPU_MIPS64_R2
Masahiro Yamada	dd84058	2014-07-30 14:08:14 +0900	[diff] [blame]	23
				24	config TARGET_MALTA
				25	bool "Support malta"
Paul Burton	05e3425	2016-01-29 13:54:52 +0000	[diff] [blame]	26	select DYNAMIC_IO_PORT_BASE
Daniel Schwierzeck	0e1dc34	2014-10-26 14:14:07 +0100	[diff] [blame]	27	select SUPPORTS_BIG_ENDIAN
				28	select SUPPORTS_LITTLE_ENDIAN
Daniel Schwierzeck	02611cb	2014-10-26 14:14:07 +0100	[diff] [blame]	29	select SUPPORTS_CPU_MIPS32_R1
				30	select SUPPORTS_CPU_MIPS32_R2
Daniel Schwierzeck	9d638ee	2015-01-18 22:00:18 +0100	[diff] [blame]	31	select SWAP_IO_SPACE
Daniel Schwierzeck	f53830e	2016-01-09 17:32:50 +0100	[diff] [blame]	32	select MIPS_L1_CACHE_SHIFT_6
Masahiro Yamada	dd84058	2014-07-30 14:08:14 +0900	[diff] [blame]	33
				34	config TARGET_VCT
				35	bool "Support vct"
Daniel Schwierzeck	0e1dc34	2014-10-26 14:14:07 +0100	[diff] [blame]	36	select SUPPORTS_BIG_ENDIAN
Daniel Schwierzeck	02611cb	2014-10-26 14:14:07 +0100	[diff] [blame]	37	select SUPPORTS_CPU_MIPS32_R1
				38	select SUPPORTS_CPU_MIPS32_R2
Paul Burton	dd7c720	2015-01-29 01:28:02 +0000	[diff] [blame]	39	select SYS_MIPS_CACHE_INIT_RAM_LOAD
Masahiro Yamada	dd84058	2014-07-30 14:08:14 +0900	[diff] [blame]	40
				41	config TARGET_DBAU1X00
				42	bool "Support dbau1x00"
Daniel Schwierzeck	0e1dc34	2014-10-26 14:14:07 +0100	[diff] [blame]	43	select SUPPORTS_BIG_ENDIAN
				44	select SUPPORTS_LITTLE_ENDIAN
Daniel Schwierzeck	02611cb	2014-10-26 14:14:07 +0100	[diff] [blame]	45	select SUPPORTS_CPU_MIPS32_R1
				46	select SUPPORTS_CPU_MIPS32_R2
Paul Burton	dd7c720	2015-01-29 01:28:02 +0000	[diff] [blame]	47	select SYS_MIPS_CACHE_INIT_RAM_LOAD
Daniel Schwierzeck	0315a28	2015-12-26 19:55:37 +0100	[diff] [blame]	48	select MIPS_TUNE_4KC
Masahiro Yamada	dd84058	2014-07-30 14:08:14 +0900	[diff] [blame]	49
				50	config TARGET_PB1X00
				51	bool "Support pb1x00"
Daniel Schwierzeck	0e1dc34	2014-10-26 14:14:07 +0100	[diff] [blame]	52	select SUPPORTS_LITTLE_ENDIAN
Daniel Schwierzeck	02611cb	2014-10-26 14:14:07 +0100	[diff] [blame]	53	select SUPPORTS_CPU_MIPS32_R1
				54	select SUPPORTS_CPU_MIPS32_R2
Paul Burton	dd7c720	2015-01-29 01:28:02 +0000	[diff] [blame]	55	select SYS_MIPS_CACHE_INIT_RAM_LOAD
Daniel Schwierzeck	0315a28	2015-12-26 19:55:37 +0100	[diff] [blame]	56	select MIPS_TUNE_4KC
Masahiro Yamada	dd84058	2014-07-30 14:08:14 +0900	[diff] [blame]	57
Purna Chandra Mandal	32c1a6e	2016-01-28 15:30:10 +0530	[diff] [blame]	58	config MACH_PIC32
				59	bool "Support Microchip PIC32"
				60	select OF_CONTROL
				61	select DM
				62
Masahiro Yamada	dd84058	2014-07-30 14:08:14 +0900	[diff] [blame]	63	endchoice
				64
				65	source "board/dbau1x00/Kconfig"
				66	source "board/imgtec/malta/Kconfig"
				67	source "board/micronas/vct/Kconfig"
				68	source "board/pb1x00/Kconfig"
				69	source "board/qemu-mips/Kconfig"
Purna Chandra Mandal	32c1a6e	2016-01-28 15:30:10 +0530	[diff] [blame]	70	source "arch/mips/mach-pic32/Kconfig"
Masahiro Yamada	dd84058	2014-07-30 14:08:14 +0900	[diff] [blame]	71
Daniel Schwierzeck	0e1dc34	2014-10-26 14:14:07 +0100	[diff] [blame]	72	if MIPS
				73
				74	choice
				75	prompt "Endianness selection"
				76	help
				77	Some MIPS boards can be configured for either little or big endian
				78	byte order. These modes require different U-Boot images. In general there
				79	is one preferred byteorder for a particular system but some systems are
				80	just as commonly used in the one or the other endianness.
				81
				82	config SYS_BIG_ENDIAN
				83	bool "Big endian"
				84	depends on SUPPORTS_BIG_ENDIAN
				85
				86	config SYS_LITTLE_ENDIAN
				87	bool "Little endian"
				88	depends on SUPPORTS_LITTLE_ENDIAN
				89
				90	endchoice
				91
Daniel Schwierzeck	02611cb	2014-10-26 14:14:07 +0100	[diff] [blame]	92	choice
				93	prompt "CPU selection"
				94	default CPU_MIPS32_R2
				95
				96	config CPU_MIPS32_R1
				97	bool "MIPS32 Release 1"
				98	depends on SUPPORTS_CPU_MIPS32_R1
				99	select 32BIT
				100	help
				101	Choose this option to build an U-Boot for release 1 or later of the
				102	MIPS32 architecture.
				103
				104	config CPU_MIPS32_R2
				105	bool "MIPS32 Release 2"
				106	depends on SUPPORTS_CPU_MIPS32_R2
				107	select 32BIT
				108	help
				109	Choose this option to build an U-Boot for release 2 or later of the
				110	MIPS32 architecture.
				111
				112	config CPU_MIPS64_R1
				113	bool "MIPS64 Release 1"
				114	depends on SUPPORTS_CPU_MIPS64_R1
				115	select 64BIT
				116	help
				117	Choose this option to build a kernel for release 1 or later of the
				118	MIPS64 architecture.
				119
				120	config CPU_MIPS64_R2
				121	bool "MIPS64 Release 2"
				122	depends on SUPPORTS_CPU_MIPS64_R2
				123	select 64BIT
				124	help
				125	Choose this option to build a kernel for release 2 or later of the
				126	MIPS64 architecture.
				127
				128	endchoice
				129
Daniel Schwierzeck	25fc664	2015-01-14 21:44:13 +0100	[diff] [blame]	130	menu "OS boot interface"
				131
				132	config MIPS_BOOT_CMDLINE_LEGACY
				133	bool "Hand over legacy command line to Linux kernel"
				134	default y
				135	help
				136	Enable this option if you want U-Boot to hand over the Yamon-style
				137	command line to the kernel. All bootargs will be prepared as argc/argv
				138	compatible list. The argument count (argc) is stored in register $a0.
				139	The address of the argument list (argv) is stored in register $a1.
				140
Daniel Schwierzeck	ca65e58	2015-01-14 21:44:13 +0100	[diff] [blame]	141	config MIPS_BOOT_ENV_LEGACY
				142	bool "Hand over legacy environment to Linux kernel"
				143	default y
				144	help
				145	Enable this option if you want U-Boot to hand over the Yamon-style
				146	environment to the kernel. Information like memory size, initrd
				147	address and size will be prepared as zero-terminated key/value list.
Robert P. J. Day	1cc0a9f	2016-05-04 04:47:31 -0400	[diff] [blame]	148	The address of the environment is stored in register $a2.
Daniel Schwierzeck	ca65e58	2015-01-14 21:44:13 +0100	[diff] [blame]	149
Daniel Schwierzeck	5002d8c	2015-01-14 21:44:13 +0100	[diff] [blame]	150	config MIPS_BOOT_FDT
Daniel Schwierzeck	90b1c9f	2015-02-22 16:58:30 +0100	[diff] [blame]	151	bool "Hand over a flattened device tree to Linux kernel"
Daniel Schwierzeck	5002d8c	2015-01-14 21:44:13 +0100	[diff] [blame]	152	default n
				153	help
				154	Enable this option if you want U-Boot to hand over a flattened
Daniel Schwierzeck	90b1c9f	2015-02-22 16:58:30 +0100	[diff] [blame]	155	device tree to the kernel. According to UHI register $a0 will be set
				156	to -2 and the FDT address is stored in $a1.
Daniel Schwierzeck	5002d8c	2015-01-14 21:44:13 +0100	[diff] [blame]	157
Daniel Schwierzeck	25fc664	2015-01-14 21:44:13 +0100	[diff] [blame]	158	endmenu
				159
Daniel Schwierzeck	0e1dc34	2014-10-26 14:14:07 +0100	[diff] [blame]	160	config SUPPORTS_BIG_ENDIAN
				161	bool
				162
				163	config SUPPORTS_LITTLE_ENDIAN
				164	bool
				165
Daniel Schwierzeck	02611cb	2014-10-26 14:14:07 +0100	[diff] [blame]	166	config SUPPORTS_CPU_MIPS32_R1
				167	bool
				168
				169	config SUPPORTS_CPU_MIPS32_R2
				170	bool
				171
				172	config SUPPORTS_CPU_MIPS64_R1
				173	bool
				174
				175	config SUPPORTS_CPU_MIPS64_R2
				176	bool
				177
Daniel Schwierzeck	c57dafb	2015-01-18 21:59:35 +0100	[diff] [blame]	178	config CPU_MIPS32
				179	bool
				180	default y if CPU_MIPS32_R1 \|\| CPU_MIPS32_R2
				181
				182	config CPU_MIPS64
				183	bool
				184	default y if CPU_MIPS64_R1 \|\| CPU_MIPS64_R2
				185
Daniel Schwierzeck	0315a28	2015-12-26 19:55:37 +0100	[diff] [blame]	186	config MIPS_TUNE_4KC
				187	bool
				188
				189	config MIPS_TUNE_14KC
				190	bool
				191
				192	config MIPS_TUNE_24KC
				193	bool
				194
Daniel Schwierzeck	02611cb	2014-10-26 14:14:07 +0100	[diff] [blame]	195	config 32BIT
				196	bool
				197
				198	config 64BIT
				199	bool
				200
Daniel Schwierzeck	9d638ee	2015-01-18 22:00:18 +0100	[diff] [blame]	201	config SWAP_IO_SPACE
				202	bool
				203
Paul Burton	dd7c720	2015-01-29 01:28:02 +0000	[diff] [blame]	204	config SYS_MIPS_CACHE_INIT_RAM_LOAD
				205	bool
				206
Daniel Schwierzeck	f53830e	2016-01-09 17:32:50 +0100	[diff] [blame]	207	config MIPS_L1_CACHE_SHIFT_4
				208	bool
				209
				210	config MIPS_L1_CACHE_SHIFT_5
				211	bool
				212
				213	config MIPS_L1_CACHE_SHIFT_6
				214	bool
				215
				216	config MIPS_L1_CACHE_SHIFT_7
				217	bool
				218
				219	config MIPS_L1_CACHE_SHIFT
				220	int
				221	default "7" if MIPS_L1_CACHE_SHIFT_7
				222	default "6" if MIPS_L1_CACHE_SHIFT_6
				223	default "5" if MIPS_L1_CACHE_SHIFT_5
				224	default "4" if MIPS_L1_CACHE_SHIFT_4
				225	default "5"
				226
Paul Burton	05e3425	2016-01-29 13:54:52 +0000	[diff] [blame]	227	config DYNAMIC_IO_PORT_BASE
				228	bool
				229
Daniel Schwierzeck	0e1dc34	2014-10-26 14:14:07 +0100	[diff] [blame]	230	endif
				231
Masahiro Yamada	dd84058	2014-07-30 14:08:14 +0900	[diff] [blame]	232	endmenu