blob: a62bf9f189678f52a56a384b6630f1d94f1d8c29 [file] [log] [blame]
Simon Guinot77ea0712011-11-21 19:25:47 +05301/*
2 * Copyright (C) 2011 Simon Guinot <sguinot@lacie.com>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 */
9
10#include <common.h>
11#include <i2c.h>
12#include <miiphy.h>
13
14#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
15
Simon Guinot37235492012-09-06 10:51:42 +000016#define MII_MARVELL_PHY_PAGE 22
17
Simon Guinot77ea0712011-11-21 19:25:47 +053018#define MV88E1116_LED_FCTRL_REG 10
19#define MV88E1116_CPRSP_CR3_REG 21
20#define MV88E1116_MAC_CTRL_REG 21
Simon Guinot77ea0712011-11-21 19:25:47 +053021#define MV88E1116_RGMII_TXTM_CTRL (1 << 4)
22#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
23
Simon Guinotc59c0852012-06-05 13:16:00 +000024void mv_phy_88e1116_init(const char *name, u16 phyaddr)
Simon Guinot77ea0712011-11-21 19:25:47 +053025{
26 u16 reg;
Simon Guinot77ea0712011-11-21 19:25:47 +053027
28 if (miiphy_set_current_dev(name))
29 return;
30
Simon Guinot77ea0712011-11-21 19:25:47 +053031 /*
32 * Enable RGMII delay on Tx and Rx for CPU port
33 * Ref: sec 4.7.2 of chip datasheet
34 */
Simon Guinot37235492012-09-06 10:51:42 +000035 miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 2);
Simon Guinotc59c0852012-06-05 13:16:00 +000036 miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL_REG, &reg);
Simon Guinot77ea0712011-11-21 19:25:47 +053037 reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
Simon Guinotc59c0852012-06-05 13:16:00 +000038 miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL_REG, reg);
Simon Guinot37235492012-09-06 10:51:42 +000039 miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 0);
Simon Guinot77ea0712011-11-21 19:25:47 +053040
Simon Guinotc59c0852012-06-05 13:16:00 +000041 if (miiphy_reset(name, phyaddr) == 0)
42 printf("88E1116 Initialized on %s\n", name);
Simon Guinot77ea0712011-11-21 19:25:47 +053043}
Simon Guinot37235492012-09-06 10:51:42 +000044
45void mv_phy_88e1318_init(const char *name, u16 phyaddr)
46{
47 u16 reg;
48
49 if (miiphy_set_current_dev(name))
50 return;
51
52 /*
53 * Set control mode 4 for LED[0].
54 */
55 miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 3);
56 miiphy_read(name, phyaddr, 16, &reg);
57 reg |= 0xf;
58 miiphy_write(name, phyaddr, 16, reg);
59
60 /*
61 * Enable RGMII delay on Tx and Rx for CPU port
62 * Ref: sec 4.7.2 of chip datasheet
63 */
64 miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 2);
65 miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL_REG, &reg);
66 reg |= (MV88E1116_RGMII_TXTM_CTRL | MV88E1116_RGMII_RXTM_CTRL);
67 miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL_REG, reg);
68 miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 0);
69
70 if (miiphy_reset(name, phyaddr) == 0)
71 printf("88E1318 Initialized on %s\n", name);
72}
Simon Guinot77ea0712011-11-21 19:25:47 +053073#endif /* CONFIG_CMD_NET && CONFIG_RESET_PHY_R */
74
75#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
76int lacie_read_mac_address(uchar *mac_addr)
77{
78 int ret;
79 ushort version;
80
81 /* I2C-0 for on-board EEPROM */
82 i2c_set_bus_num(0);
83
84 /* Check layout version for EEPROM data */
85 ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,
86 CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
87 (uchar *) &version, 2);
88 if (ret != 0) {
89 printf("Error: failed to read I2C EEPROM @%02x\n",
90 CONFIG_SYS_I2C_EEPROM_ADDR);
91 return ret;
92 }
93 version = be16_to_cpu(version);
94 if (version < 1 || version > 3) {
95 printf("Error: unknown version %d for EEPROM data\n",
96 version);
97 return -1;
98 }
99
100 /* Read Ethernet MAC address from EEPROM */
101 ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 2,
102 CONFIG_SYS_I2C_EEPROM_ADDR_LEN, mac_addr, 6);
103 if (ret != 0)
104 printf("Error: failed to read I2C EEPROM @%02x\n",
105 CONFIG_SYS_I2C_EEPROM_ADDR);
106 return ret;
107}
108#endif /* CONFIG_CMD_I2C && CONFIG_SYS_I2C_EEPROM_ADDR */