blob: 1f7dba0d6f7a57b4882d563c90e9e453cf6dd031 [file] [log] [blame]
Prabhakar Kushwaha28747f92011-01-20 16:34:41 +05301/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Author: Prabhakar Kushwaha <prabhakar@freescale.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the Free
7 * Software Foundation; either version 2 of the License, or (at your option)
8 * any later version.
9 */
10
11#include <config.h>
12#include <common.h>
13#include <asm/io.h>
14#include <asm/immap_85xx.h>
15#include <asm/fsl_serdes.h>
16
17#define SRDS1_MAX_LANES 4
18#define SRDS2_MAX_LANES 2
19
20static u32 serdes1_prtcl_map, serdes2_prtcl_map;
21
22static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
23 [0x00] = {NONE, NONE, NONE, NONE},
24 [0x01] = {PCIE1, PCIE2, SGMII_TSEC2, SGMII_TSEC3},
25 [0x02] = {PCIE1, SGMII_TSEC1, SGMII_TSEC2, SGMII_TSEC3},
26 [0x03] = {NONE, SGMII_TSEC1, SGMII_TSEC2, SGMII_TSEC3},
27};
28
29static const u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
30 [0x00] = {NONE, NONE},
31 [0x01] = {SATA1, SATA2},
32 [0x02] = {SATA1, SATA2},
33 [0x03] = {PCIE1, PCIE2},
34};
35
36
37int is_serdes_configured(enum srds_prtcl device)
38{
39 int ret = (1 << device) & serdes1_prtcl_map;
40
41 if (ret)
42 return ret;
43
44 return (1 << device) & serdes2_prtcl_map;
45}
46
47void fsl_serdes_init(void)
48{
49 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
50 u32 pordevsr = in_be32(&gur->pordevsr);
51 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
52 MPC85xx_PORDEVSR_IO_SEL_SHIFT;
53 int lane;
54
55 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
56
Axel Line51e47d2013-05-26 15:00:30 +080057 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
Prabhakar Kushwaha28747f92011-01-20 16:34:41 +053058 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
59 return;
60 }
61 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
62 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
63 serdes1_prtcl_map |= (1 << lane_prtcl);
64 }
65
Axel Line51e47d2013-05-26 15:00:30 +080066 if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) {
Prabhakar Kushwaha28747f92011-01-20 16:34:41 +053067 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
68 return;
69 }
70
71 for (lane = 0; lane < SRDS2_MAX_LANES; lane++) {
72 enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane];
73 serdes2_prtcl_map |= (1 << lane_prtcl);
74 }
75}