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Stephen Warren88077282013-01-29 16:37:36 +00001/*
2 * (C) Copyright 2012 Stephen Warren
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18#ifndef _BCM2835_MBOX_H
19#define _BCM2835_MBOX_H
20
21#include <linux/compiler.h>
22
23/*
24 * The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU")
25 * and the ARM CPU. The ARM CPU is often thought of as the main CPU.
26 * However, the VideoCore actually controls the initial SoC boot, and hides
27 * much of the hardware behind a protocol. This protocol is transported
28 * using the SoC's mailbox hardware module.
29 *
30 * The mailbox hardware supports passing 32-bit values back and forth.
31 * Presumably by software convention of the firmware, the bottom 4 bits of the
32 * value are used to indicate a logical channel, and the upper 28 bits are the
33 * actual payload. Various channels exist using these simple raw messages. See
34 * https://github.com/raspberrypi/firmware/wiki/Mailboxes for a list. As an
35 * example, the messages on the power management channel are a bitmask of
36 * devices whose power should be enabled.
37 *
38 * The property mailbox channel passes messages that contain the (16-byte
39 * aligned) ARM physical address of a memory buffer. This buffer is passed to
40 * the VC for processing, is modified in-place by the VC, and the address then
41 * passed back to the ARM CPU as the response mailbox message to indicate
42 * request completion. The buffers have a generic and extensible format; each
43 * buffer contains a standard header, a list of "tags", and a terminating zero
44 * entry. Each tag contains an ID indicating its type, and length fields for
45 * generic parsing. With some limitations, an arbitrary set of tags may be
46 * combined together into a single message buffer. This file defines structs
47 * representing the header and many individual tag layouts and IDs.
48 */
49
50/* Raw mailbox HW */
51
52#define BCM2835_MBOX_PHYSADDR 0x2000b880
53
54struct bcm2835_mbox_regs {
55 u32 read;
56 u32 rsvd0[5];
57 u32 status;
58 u32 config;
59 u32 write;
60};
61
62#define BCM2835_MBOX_STATUS_WR_FULL 0x80000000
63#define BCM2835_MBOX_STATUS_RD_EMPTY 0x40000000
64
65/* Lower 4-bits are channel ID */
66#define BCM2835_CHAN_MASK 0xf
67#define BCM2835_MBOX_PACK(chan, data) (((data) & (~BCM2835_CHAN_MASK)) | \
68 (chan & BCM2835_CHAN_MASK))
69#define BCM2835_MBOX_UNPACK_CHAN(val) ((val) & BCM2835_CHAN_MASK)
70#define BCM2835_MBOX_UNPACK_DATA(val) ((val) & (~BCM2835_CHAN_MASK))
71
72/* Property mailbox buffer structures */
73
74#define BCM2835_MBOX_PROP_CHAN 8
75
76/* All message buffers must start with this header */
77struct bcm2835_mbox_hdr {
78 u32 buf_size;
79 u32 code;
80};
81
82#define BCM2835_MBOX_REQ_CODE 0
83#define BCM2835_MBOX_RESP_CODE_SUCCESS 0x80000000
84
85#define BCM2835_MBOX_INIT_HDR(_m_) { \
86 memset((_m_), 0, sizeof(*(_m_))); \
87 (_m_)->hdr.buf_size = sizeof(*(_m_)); \
88 (_m_)->hdr.code = 0; \
89 (_m_)->end_tag = 0; \
90 }
91
92/*
93 * A message buffer contains a list of tags. Each tag must also start with
94 * a standardized header.
95 */
96struct bcm2835_mbox_tag_hdr {
97 u32 tag;
98 u32 val_buf_size;
99 u32 val_len;
100};
101
102#define BCM2835_MBOX_INIT_TAG(_t_, _id_) { \
103 (_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \
104 (_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \
105 (_t_)->tag_hdr.val_len = sizeof((_t_)->body.req); \
106 }
107
108#define BCM2835_MBOX_INIT_TAG_NO_REQ(_t_, _id_) { \
109 (_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \
110 (_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \
111 (_t_)->tag_hdr.val_len = 0; \
112 }
113
114/* When responding, the VC sets this bit in val_len to indicate a response */
115#define BCM2835_MBOX_TAG_VAL_LEN_RESPONSE 0x80000000
116
117/*
118 * Below we define the ID and struct for many possible tags. This header only
119 * defines individual tag structs, not entire message structs, since in
120 * general an arbitrary set of tags may be combined into a single message.
121 * Clients of the mbox API are expected to define their own overall message
122 * structures by combining the header, a set of tags, and a terminating
123 * entry. For example,
124 *
125 * struct msg {
126 * struct bcm2835_mbox_hdr hdr;
127 * struct bcm2835_mbox_tag_get_arm_mem get_arm_mem;
128 * ... perhaps other tags here ...
129 * u32 end_tag;
130 * };
131 */
132
133#define BCM2835_MBOX_TAG_GET_ARM_MEMORY 0x00010005
134
135struct bcm2835_mbox_tag_get_arm_mem {
136 struct bcm2835_mbox_tag_hdr tag_hdr;
137 union {
138 struct {
139 } req;
140 struct {
141 u32 mem_base;
142 u32 mem_size;
143 } resp;
144 } body;
145};
146
Stephen Warren131a1e62013-01-29 16:37:42 +0000147#define BCM2835_MBOX_TAG_GET_CLOCK_RATE 0x00030002
148
149#define BCM2835_MBOX_CLOCK_ID_EMMC 1
150#define BCM2835_MBOX_CLOCK_ID_UART 2
151#define BCM2835_MBOX_CLOCK_ID_ARM 3
152#define BCM2835_MBOX_CLOCK_ID_CORE 4
153#define BCM2835_MBOX_CLOCK_ID_V3D 5
154#define BCM2835_MBOX_CLOCK_ID_H264 6
155#define BCM2835_MBOX_CLOCK_ID_ISP 7
156#define BCM2835_MBOX_CLOCK_ID_SDRAM 8
157#define BCM2835_MBOX_CLOCK_ID_PIXEL 9
158#define BCM2835_MBOX_CLOCK_ID_PWM 10
159
160struct bcm2835_mbox_tag_get_clock_rate {
161 struct bcm2835_mbox_tag_hdr tag_hdr;
162 union {
163 struct {
164 u32 clock_id;
165 } req;
166 struct {
167 u32 clock_id;
168 u32 rate_hz;
169 } resp;
170 } body;
171};
172
Stephen Warren88077282013-01-29 16:37:36 +0000173#define BCM2835_MBOX_TAG_ALLOCATE_BUFFER 0x00040001
174
175struct bcm2835_mbox_tag_allocate_buffer {
176 struct bcm2835_mbox_tag_hdr tag_hdr;
177 union {
178 struct {
179 u32 alignment;
180 } req;
181 struct {
182 u32 fb_address;
183 u32 fb_size;
184 } resp;
185 } body;
186};
187
188#define BCM2835_MBOX_TAG_RELEASE_BUFFER 0x00048001
189
190struct bcm2835_mbox_tag_release_buffer {
191 struct bcm2835_mbox_tag_hdr tag_hdr;
192 union {
193 struct {
194 } req;
195 struct {
196 } resp;
197 } body;
198};
199
200#define BCM2835_MBOX_TAG_BLANK_SCREEN 0x00040002
201
202struct bcm2835_mbox_tag_blank_screen {
203 struct bcm2835_mbox_tag_hdr tag_hdr;
204 union {
205 struct {
206 /* bit 0 means on, other bots reserved */
207 u32 state;
208 } req;
209 struct {
210 u32 state;
211 } resp;
212 } body;
213};
214
215/* Physical means output signal */
216#define BCM2835_MBOX_TAG_GET_PHYSICAL_W_H 0x00040003
217#define BCM2835_MBOX_TAG_TEST_PHYSICAL_W_H 0x00044003
218#define BCM2835_MBOX_TAG_SET_PHYSICAL_W_H 0x00048003
219
220struct bcm2835_mbox_tag_physical_w_h {
221 struct bcm2835_mbox_tag_hdr tag_hdr;
222 union {
223 /* req not used for get */
224 struct {
225 u32 width;
226 u32 height;
227 } req;
228 struct {
229 u32 width;
230 u32 height;
231 } resp;
232 } body;
233};
234
235/* Virtual means display buffer */
236#define BCM2835_MBOX_TAG_GET_VIRTUAL_W_H 0x00040004
237#define BCM2835_MBOX_TAG_TEST_VIRTUAL_W_H 0x00044004
238#define BCM2835_MBOX_TAG_SET_VIRTUAL_W_H 0x00048004
239
240struct bcm2835_mbox_tag_virtual_w_h {
241 struct bcm2835_mbox_tag_hdr tag_hdr;
242 union {
243 /* req not used for get */
244 struct {
245 u32 width;
246 u32 height;
247 } req;
248 struct {
249 u32 width;
250 u32 height;
251 } resp;
252 } body;
253};
254
255#define BCM2835_MBOX_TAG_GET_DEPTH 0x00040005
256#define BCM2835_MBOX_TAG_TEST_DEPTH 0x00044005
257#define BCM2835_MBOX_TAG_SET_DEPTH 0x00048005
258
259struct bcm2835_mbox_tag_depth {
260 struct bcm2835_mbox_tag_hdr tag_hdr;
261 union {
262 /* req not used for get */
263 struct {
264 u32 bpp;
265 } req;
266 struct {
267 u32 bpp;
268 } resp;
269 } body;
270};
271
272#define BCM2835_MBOX_TAG_GET_PIXEL_ORDER 0x00040006
273#define BCM2835_MBOX_TAG_TEST_PIXEL_ORDER 0x00044005
274#define BCM2835_MBOX_TAG_SET_PIXEL_ORDER 0x00048006
275
276#define BCM2835_MBOX_PIXEL_ORDER_BGR 0
277#define BCM2835_MBOX_PIXEL_ORDER_RGB 1
278
279struct bcm2835_mbox_tag_pixel_order {
280 struct bcm2835_mbox_tag_hdr tag_hdr;
281 union {
282 /* req not used for get */
283 struct {
284 u32 order;
285 } req;
286 struct {
287 u32 order;
288 } resp;
289 } body;
290};
291
292#define BCM2835_MBOX_TAG_GET_ALPHA_MODE 0x00040007
293#define BCM2835_MBOX_TAG_TEST_ALPHA_MODE 0x00044007
294#define BCM2835_MBOX_TAG_SET_ALPHA_MODE 0x00048007
295
296#define BCM2835_MBOX_ALPHA_MODE_0_OPAQUE 0
297#define BCM2835_MBOX_ALPHA_MODE_0_TRANSPARENT 1
298#define BCM2835_MBOX_ALPHA_MODE_IGNORED 2
299
300struct bcm2835_mbox_tag_alpha_mode {
301 struct bcm2835_mbox_tag_hdr tag_hdr;
302 union {
303 /* req not used for get */
304 struct {
305 u32 alpha;
306 } req;
307 struct {
308 u32 alpha;
309 } resp;
310 } body;
311};
312
313#define BCM2835_MBOX_TAG_GET_PITCH 0x00040008
314
315struct bcm2835_mbox_tag_pitch {
316 struct bcm2835_mbox_tag_hdr tag_hdr;
317 union {
318 struct {
319 } req;
320 struct {
321 u32 pitch;
322 } resp;
323 } body;
324};
325
326/* Offset of display window within buffer */
327#define BCM2835_MBOX_TAG_GET_VIRTUAL_OFFSET 0x00040009
328#define BCM2835_MBOX_TAG_TEST_VIRTUAL_OFFSET 0x00044009
329#define BCM2835_MBOX_TAG_SET_VIRTUAL_OFFSET 0x00048009
330
331struct bcm2835_mbox_tag_virtual_offset {
332 struct bcm2835_mbox_tag_hdr tag_hdr;
333 union {
334 /* req not used for get */
335 struct {
336 u32 x;
337 u32 y;
338 } req;
339 struct {
340 u32 x;
341 u32 y;
342 } resp;
343 } body;
344};
345
346#define BCM2835_MBOX_TAG_GET_OVERSCAN 0x0004000a
347#define BCM2835_MBOX_TAG_TEST_OVERSCAN 0x0004400a
348#define BCM2835_MBOX_TAG_SET_OVERSCAN 0x0004800a
349
350struct bcm2835_mbox_tag_overscan {
351 struct bcm2835_mbox_tag_hdr tag_hdr;
352 union {
353 /* req not used for get */
354 struct {
355 u32 top;
356 u32 bottom;
357 u32 left;
358 u32 right;
359 } req;
360 struct {
361 u32 top;
362 u32 bottom;
363 u32 left;
364 } resp;
365 } body;
366};
367
368#define BCM2835_MBOX_TAG_GET_PALETTE 0x0004000b
369
370struct bcm2835_mbox_tag_get_palette {
371 struct bcm2835_mbox_tag_hdr tag_hdr;
372 union {
373 struct {
374 } req;
375 struct {
376 u32 data[1024];
377 } resp;
378 } body;
379};
380
381#define BCM2835_MBOX_TAG_TEST_PALETTE 0x0004400b
382
383struct bcm2835_mbox_tag_test_palette {
384 struct bcm2835_mbox_tag_hdr tag_hdr;
385 union {
386 struct {
387 u32 offset;
388 u32 num_entries;
389 u32 data[256];
390 } req;
391 struct {
392 u32 is_invalid;
393 } resp;
394 } body;
395};
396
397#define BCM2835_MBOX_TAG_SET_PALETTE 0x0004800b
398
399struct bcm2835_mbox_tag_set_palette {
400 struct bcm2835_mbox_tag_hdr tag_hdr;
401 union {
402 struct {
403 u32 offset;
404 u32 num_entries;
405 u32 data[256];
406 } req;
407 struct {
408 u32 is_invalid;
409 } resp;
410 } body;
411};
412
413/*
414 * Pass a raw u32 message to the VC, and receive a raw u32 back.
415 *
416 * Returns 0 for success, any other value for error.
417 */
418int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv);
419
420/*
421 * Pass a complete property-style buffer to the VC, and wait until it has
422 * been processed.
423 *
424 * This function expects a pointer to the mbox_hdr structure in an attempt
425 * to ensure some degree of type safety. However, some number of tags and
426 * a termination value are expected to immediately follow the header in
427 * memory, as required by the property protocol.
428 *
429 * Returns 0 for success, any other value for error.
430 */
431int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer);
432
433#endif