Lukasz Majewski | 1d7993d | 2019-06-24 15:50:45 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2019 DENX Software Engineering |
| 4 | * Lukasz Majewski, DENX Software Engineering, lukma@denx.de |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <asm/io.h> |
| 9 | #include <malloc.h> |
| 10 | #include <clk-uclass.h> |
| 11 | #include <dm/device.h> |
| 12 | #include <dm/uclass.h> |
| 13 | #include <clk.h> |
| 14 | #include "clk.h" |
| 15 | |
| 16 | #define UBOOT_DM_CLK_IMX_PLLV3 "imx_clk_pllv3" |
| 17 | |
| 18 | struct clk_pllv3 { |
| 19 | struct clk clk; |
| 20 | void __iomem *base; |
| 21 | u32 div_mask; |
| 22 | u32 div_shift; |
| 23 | }; |
| 24 | |
| 25 | #define to_clk_pllv3(_clk) container_of(_clk, struct clk_pllv3, clk) |
| 26 | |
| 27 | static ulong clk_pllv3_get_rate(struct clk *clk) |
| 28 | { |
| 29 | struct clk_pllv3 *pll = to_clk_pllv3(dev_get_clk_ptr(clk->dev)); |
| 30 | unsigned long parent_rate = clk_get_parent_rate(clk); |
| 31 | |
| 32 | u32 div = (readl(pll->base) >> pll->div_shift) & pll->div_mask; |
| 33 | |
| 34 | return (div == 1) ? parent_rate * 22 : parent_rate * 20; |
| 35 | } |
| 36 | |
| 37 | static const struct clk_ops clk_pllv3_generic_ops = { |
| 38 | .get_rate = clk_pllv3_get_rate, |
| 39 | }; |
| 40 | |
| 41 | struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, |
| 42 | const char *parent_name, void __iomem *base, |
| 43 | u32 div_mask) |
| 44 | { |
| 45 | struct clk_pllv3 *pll; |
| 46 | struct clk *clk; |
| 47 | char *drv_name; |
| 48 | int ret; |
| 49 | |
| 50 | pll = kzalloc(sizeof(*pll), GFP_KERNEL); |
| 51 | if (!pll) |
| 52 | return ERR_PTR(-ENOMEM); |
| 53 | |
| 54 | switch (type) { |
| 55 | case IMX_PLLV3_GENERIC: |
| 56 | case IMX_PLLV3_USB: |
| 57 | drv_name = UBOOT_DM_CLK_IMX_PLLV3; |
| 58 | break; |
| 59 | default: |
| 60 | kfree(pll); |
| 61 | return ERR_PTR(-ENOTSUPP); |
| 62 | } |
| 63 | |
| 64 | pll->base = base; |
| 65 | pll->div_mask = div_mask; |
| 66 | clk = &pll->clk; |
| 67 | |
| 68 | ret = clk_register(clk, drv_name, name, parent_name); |
| 69 | if (ret) { |
| 70 | kfree(pll); |
| 71 | return ERR_PTR(ret); |
| 72 | } |
| 73 | |
| 74 | return clk; |
| 75 | } |
| 76 | |
| 77 | U_BOOT_DRIVER(clk_pllv3_generic) = { |
| 78 | .name = UBOOT_DM_CLK_IMX_PLLV3, |
| 79 | .id = UCLASS_CLK, |
| 80 | .ops = &clk_pllv3_generic_ops, |
| 81 | .flags = DM_FLAG_PRE_RELOC, |
| 82 | }; |