SDRAM now working for delta board, but there are still aliasing problems,
we only see 64MB.
diff --git a/include/configs/delta.h b/include/configs/delta.h
index 7b923c2..786ed9a 100644
--- a/include/configs/delta.h
+++ b/include/configs/delta.h
@@ -143,14 +143,14 @@
* Physical Memory Map
*/
#define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */
-#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
-#define PHYS_SDRAM_2 0xa4000000 /* SDRAM Bank #2 */
-#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 MB */
-#define PHYS_SDRAM_3 0xa8000000 /* SDRAM Bank #3 */
-#define PHYS_SDRAM_3_SIZE 0x00000000 /* 0 MB */
-#define PHYS_SDRAM_4 0xac000000 /* SDRAM Bank #4 */
-#define PHYS_SDRAM_4_SIZE 0x00000000 /* 0 MB */
+#define PHYS_SDRAM_1 0x80000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x8000000 /* 128 MB */
+#define PHYS_SDRAM_2 0x88000000 /* SDRAM Bank #2 */
+#define PHYS_SDRAM_2_SIZE 0x8000000 /* 128 MB */
+#define PHYS_SDRAM_3 0x90000000 /* SDRAM Bank #3 */
+#define PHYS_SDRAM_3_SIZE 0x8000000 /* 128 MB */
+#define PHYS_SDRAM_4 0x98000000 /* SDRAM Bank #4 */
+#define PHYS_SDRAM_4_SIZE 0x8000000 /* 128 MB */
#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
#define PHYS_FLASH_2 0x04000000 /* Flash Bank #2 */
@@ -158,8 +158,10 @@
#define PHYS_FLASH_BANK_SIZE 0x02000000 /* 32 MB Banks */
#define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */
-#define CFG_DRAM_BASE 0xa0000000
-#define CFG_DRAM_SIZE 0x04000000
+#define CFG_DRAM_BASE 0x80000000 /* at CS0 */
+#define CFG_DRAM_SIZE 0x20000000 /* 512 MB Ram */
+
+#define CFG_SKIP_DRAM_SCRUB 1
#define CFG_FLASH_BASE PHYS_FLASH_1
diff --git a/include/configs/zylonite.h b/include/configs/zylonite.h
index a8ff9fd..4232d50 100644
--- a/include/configs/zylonite.h
+++ b/include/configs/zylonite.h
@@ -120,8 +120,8 @@
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
#define CFG_DEVICE_NULLDEV 1
-#define CFG_MEMTEST_START 0xa0400000 /* memtest works on */
-#define CFG_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
+#define CFG_MEMTEST_START 0x9c000000 /* memtest works on */
+#define CFG_MEMTEST_END 0x9c400000 /* 4 ... 8 MB in DRAM */
#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */