diff --git a/arch/arm/mach-uniphier/cmd_ddrphy.c b/arch/arm/mach-uniphier/cmd_ddrphy.c
index dbbefd4..f9b79ab 100644
--- a/arch/arm/mach-uniphier/cmd_ddrphy.c
+++ b/arch/arm/mach-uniphier/cmd_ddrphy.c
@@ -50,7 +50,7 @@
 	printf(FS "(+" PRINTF_FORMAT ")", readl(&dx->lcdlr[1]) & 0xff);
 }
 
-void wbdl_dump(void)
+static void wbdl_dump(void)
 {
 	printf("\n--- Write Bit Delay Line ---\n");
 	printf("           DQ0  DQ1  DQ2  DQ3  DQ4  DQ5  DQ6  DQ7   DM  DQS  (WDQD)\n");
@@ -68,7 +68,7 @@
 	printf(FS "(+" PRINTF_FORMAT ")", (readl(&dx->lcdlr[1]) >> 8) & 0xff);
 }
 
-void rbdl_dump(void)
+static void rbdl_dump(void)
 {
 	printf("\n--- Read Bit Delay Line ---\n");
 	printf("           DQ0  DQ1  DQ2  DQ3  DQ4  DQ5  DQ6  DQ7   DM  (RDQSD)\n");
@@ -91,7 +91,7 @@
 	}
 }
 
-void wld_dump(void)
+static void wld_dump(void)
 {
 	printf("\n--- Write Leveling Delay ---\n");
 	printf("            Rank0   Rank1   Rank2   Rank3\n");
@@ -113,7 +113,7 @@
 	}
 }
 
-void dqsgd_dump(void)
+static void dqsgd_dump(void)
 {
 	printf("\n--- DQS Gating Delay ---\n");
 	printf("            Rank0   Rank1   Rank2   Rank3\n");
@@ -129,7 +129,7 @@
 		printf(FS PRINTF_FORMAT, (mdl >> (8 * i)) & 0xff);
 }
 
-void mdl_dump(void)
+static void mdl_dump(void)
 {
 	printf("\n--- Master Delay Line ---\n");
 	printf("          IPRD TPRD MDLD\n");
@@ -141,7 +141,7 @@
 	{ u32 __iomem *p = &phy->x; printf("%3d: %-10s: %p : %08x\n", \
 					p - (u32 *)phy, #x, p, readl(p)); }
 
-void reg_dump(void)
+static void reg_dump(void)
 {
 	int ch, p;
 	struct ddrphy __iomem *phy;