commit fa7a51cb8272bd6076ea4701fd6bdc65a68703ba
author Otavio Salvador <otavio@ossystems.com.br> Mon Aug 13 09:53:12 2012 +0000
committer Albert ARIBAUD <albert.u.boot@aribaud.net> Sat Sep 01 14:58:25 2012 +0200
tree b1dd7f9cc3921fb5eb1cd0cbd9a34b1e197f7ae9
parent af963ba8f4f301475d13faa42b5dec8f0ed3c23a

mxs: Convert sys_proto.h prefixes to 'mxs'

The sys_proto.h functions (except the boot modes) are compatible with
i.MX233 and i.MX28 so we use 'mxs' prefix for its methods.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>

arch/arm/cpu/arm926ejs/mxs/mxs.c

diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c
index a61f75b..c028e5e 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxs.c
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c
@@ -41,8 +41,8 @@
 /* 1 second delay should be plenty of time for block reset. */
 #define	RESET_MAX_TIMEOUT	1000000
 
-#define	MX28_BLOCK_SFTRST	(1 << 31)
-#define	MX28_BLOCK_CLKGATE	(1 << 30)
+#define	MXS_BLOCK_SFTRST	(1 << 31)
+#define	MXS_BLOCK_CLKGATE	(1 << 30)
 
 /* Lowlevel init isn't used on i.MX28, so just have a dummy here */
 inline void lowlevel_init(void) {}
@@ -81,7 +81,7 @@
 #endif
 }
 
-int mx28_wait_mask_set(struct mxs_register_32 *reg, uint32_t mask, int timeout)
+int mxs_wait_mask_set(struct mxs_register_32 *reg, uint32_t mask, int timeout)
 {
 	while (--timeout) {
 		if ((readl(&reg->reg) & mask) == mask)
@@ -92,7 +92,7 @@
 	return !timeout;
 }
 
-int mx28_wait_mask_clr(struct mxs_register_32 *reg, uint32_t mask, int timeout)
+int mxs_wait_mask_clr(struct mxs_register_32 *reg, uint32_t mask, int timeout)
 {
 	while (--timeout) {
 		if ((readl(&reg->reg) & mask) == 0)
@@ -103,34 +103,34 @@
 	return !timeout;
 }
 
-int mx28_reset_block(struct mxs_register_32 *reg)
+int mxs_reset_block(struct mxs_register_32 *reg)
 {
 	/* Clear SFTRST */
-	writel(MX28_BLOCK_SFTRST, &reg->reg_clr);
+	writel(MXS_BLOCK_SFTRST, &reg->reg_clr);
 
-	if (mx28_wait_mask_clr(reg, MX28_BLOCK_SFTRST, RESET_MAX_TIMEOUT))
+	if (mxs_wait_mask_clr(reg, MXS_BLOCK_SFTRST, RESET_MAX_TIMEOUT))
 		return 1;
 
 	/* Clear CLKGATE */
-	writel(MX28_BLOCK_CLKGATE, &reg->reg_clr);
+	writel(MXS_BLOCK_CLKGATE, &reg->reg_clr);
 
 	/* Set SFTRST */
-	writel(MX28_BLOCK_SFTRST, &reg->reg_set);
+	writel(MXS_BLOCK_SFTRST, &reg->reg_set);
 
 	/* Wait for CLKGATE being set */
-	if (mx28_wait_mask_set(reg, MX28_BLOCK_CLKGATE, RESET_MAX_TIMEOUT))
+	if (mxs_wait_mask_set(reg, MXS_BLOCK_CLKGATE, RESET_MAX_TIMEOUT))
 		return 1;
 
 	/* Clear SFTRST */
-	writel(MX28_BLOCK_SFTRST, &reg->reg_clr);
+	writel(MXS_BLOCK_SFTRST, &reg->reg_clr);
 
-	if (mx28_wait_mask_clr(reg, MX28_BLOCK_SFTRST, RESET_MAX_TIMEOUT))
+	if (mxs_wait_mask_clr(reg, MXS_BLOCK_SFTRST, RESET_MAX_TIMEOUT))
 		return 1;
 
 	/* Clear CLKGATE */
-	writel(MX28_BLOCK_CLKGATE, &reg->reg_clr);
+	writel(MXS_BLOCK_CLKGATE, &reg->reg_clr);
 
-	if (mx28_wait_mask_clr(reg, MX28_BLOCK_CLKGATE, RESET_MAX_TIMEOUT))
+	if (mxs_wait_mask_clr(reg, MXS_BLOCK_CLKGATE, RESET_MAX_TIMEOUT))
 		return 1;
 
 	return 0;
@@ -229,7 +229,7 @@
 		get_cpu_type(),
 		get_cpu_rev(),
 		mxc_get_clock(MXC_ARM_CLK) / 1000000);
-	printf("BOOT:  %s\n", mx28_boot_modes[data->boot_mode_idx].mode);
+	printf("BOOT:  %s\n", mxs_boot_modes[data->boot_mode_idx].mode);
 	return 0;
 }
 #endif
@@ -299,7 +299,7 @@
 
 	writel(OCOTP_CTRL_RD_BANK_OPEN, &ocotp_regs->hw_ocotp_ctrl_set);
 
-	if (mx28_wait_mask_clr(&ocotp_regs->hw_ocotp_ctrl_reg, OCOTP_CTRL_BUSY,
+	if (mxs_wait_mask_clr(&ocotp_regs->hw_ocotp_ctrl_reg, OCOTP_CTRL_BUSY,
 				MXS_OCOTP_MAX_TIMEOUT)) {
 		printf("MXS FEC: Can't get MAC from OCOTP\n");
 		return;

arch/arm/cpu/arm926ejs/mxs/spl_boot.c

diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
index 84d4a17..ddafddb 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -82,9 +82,9 @@
 	bootmode |= (gpio_get_value(MX28_PAD_LCD_D04__GPIO_1_4) ? 1 : 0) << 4;
 	bootmode |= (gpio_get_value(MX28_PAD_LCD_D05__GPIO_1_5) ? 1 : 0) << 5;
 
-	for (i = 0; i < ARRAY_SIZE(mx28_boot_modes); i++) {
-		masked = bootmode & mx28_boot_modes[i].boot_mask;
-		if (masked == mx28_boot_modes[i].boot_pads)
+	for (i = 0; i < ARRAY_SIZE(mxs_boot_modes); i++) {
+		masked = bootmode & mxs_boot_modes[i].boot_mask;
+		if (masked == mxs_boot_modes[i].boot_pads)
 			break;
 	}
 

arch/arm/cpu/arm926ejs/mxs/timer.c

diff --git a/arch/arm/cpu/arm926ejs/mxs/timer.c b/arch/arm/cpu/arm926ejs/mxs/timer.c
index c4b0f5e..4ed75e6 100644
--- a/arch/arm/cpu/arm926ejs/mxs/timer.c
+++ b/arch/arm/cpu/arm926ejs/mxs/timer.c
@@ -66,7 +66,7 @@
 		(struct mxs_timrot_regs *)MXS_TIMROT_BASE;
 
 	/* Reset Timers and Rotary Encoder module */
-	mx28_reset_block(&timrot_regs->hw_timrot_rotctrl_reg);
+	mxs_reset_block(&timrot_regs->hw_timrot_rotctrl_reg);
 
 	/* Set fixed_count to 0 */
 	writel(0, &timrot_regs->hw_timrot_fixed_count0);