tree 5b527e00ff555f243c9c58d2c511c50487acfe7c
parent 9404758e9baf0472d6958efaa7df1aa757b237d8
author Aneesh V <aneesh@ti.com> 1321918744 +0000
committer Albert ARIBAUD <albert.u.boot@aribaud.net> 1323212374 +0100

omap4+: streamline CONFIG_SYS_TEXT_BASE and other SDRAM addresses

Change the CONFIG_SYS_TEXT_BASE and the addresses of SDRAM
buffers used by SPL(heap and BSS) keeping in mind the
following requirements:

1. Make sure that SPL's heap and BSS doesn't come in the way
of Linux kernel, which is typically loaded at 0x80008000. This
will be important when SPL directly loads kernel.

2. Align the CONFIG_SYS_TEXT_BASE between TI internal
U-Boot and mainline U-Boot. This avoids a lot of confusion
and allows for the inter-operability of x-loader, SPL,
internal U-Boot, mainline U-Boot etc. The internal U-Boot's
address can not be changed to that of mainline U-Boot
as internal U-Boot doesn't have relocation and 0x80100000
used by mainline U-Boot will clash with kernel

3. Assume only a minimum amount of memory that may be available
on any practical OMAP4/5 board in future too. We are assuming
a minimum of 128 MB of memory

Signed-off-by: Aneesh V <aneesh@ti.com>