S5P: Exynos: Add GPIO pin numbering and rename definitions
This patch includes following changes :
* Adds gpio pin numbering support for EXYNOS SOCs.
To have consistent 0..n-1 GPIO numbering the banks are divided
into different parts where ever they have holes in them.
* Rename GPIO definitions from GPIO_... to S5P_GPIO_...
These changes were done to enable cmd_gpio for EXYNOS and
cmd_gpio has GPIO_INPUT same as s5p_gpio driver and hence
getting a error during compilation.
* Adds support for name to gpio conversion in s5p_gpio to enable
gpio command EXYNOS SoCs. Function has been added to asm/gpio.h
to decode the input gpio name to gpio number.
Example: SMDK5420 # gpio set gpa00
Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
index 61b9ece..4cea63b 100644
--- a/board/samsung/goni/goni.c
+++ b/board/samsung/goni/goni.c
@@ -17,8 +17,6 @@
DECLARE_GLOBAL_DATA_PTR;
-static struct s5pc110_gpio *s5pc110_gpio;
-
u32 get_board_rev(void)
{
return 0;
@@ -27,8 +25,6 @@
int board_init(void)
{
/* Set Initial global variables */
- s5pc110_gpio = (struct s5pc110_gpio *)S5PC110_GPIO_BASE;
-
gd->bd->bi_arch_number = MACH_TYPE_GONI;
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
@@ -82,7 +78,7 @@
int i, ret, ret_sd = 0;
/* MASSMEMORY_EN: XMSMDATA7: GPJ2[7] output high */
- s5p_gpio_direction_output(&s5pc110_gpio->j2, 7, 1);
+ gpio_direction_output(S5PC110_GPIO_J27, 1);
/*
* MMC0 GPIO
@@ -91,15 +87,15 @@
* GPG0[2] SD_0_CDn -> Not used
* GPG0[3:6] SD_0_DATA[0:3]
*/
- for (i = 0; i < 7; i++) {
- if (i == 2)
+ for (i = S5PC110_GPIO_G00; i < S5PC110_GPIO_G07; i++) {
+ if (i == S5PC110_GPIO_G02)
continue;
/* GPG0[0:6] special function 2 */
- s5p_gpio_cfg_pin(&s5pc110_gpio->g0, i, 0x2);
+ gpio_cfg_pin(i, 0x2);
/* GPG0[0:6] pull disable */
- s5p_gpio_set_pull(&s5pc110_gpio->g0, i, GPIO_PULL_NONE);
+ gpio_set_pull(i, S5P_GPIO_PULL_NONE);
/* GPG0[0:6] drv 4x */
- s5p_gpio_set_drv(&s5pc110_gpio->g0, i, GPIO_DRV_4X);
+ gpio_set_drv(i, S5P_GPIO_DRV_4X);
}
ret = s5p_mmc_init(0, 4);
@@ -110,20 +106,20 @@
* SD card (T_FLASH) detect and init
* T_FLASH_DETECT: EINT28: GPH3[4] input mode
*/
- s5p_gpio_cfg_pin(&s5pc110_gpio->h3, 4, GPIO_INPUT);
- s5p_gpio_set_pull(&s5pc110_gpio->h3, 4, GPIO_PULL_UP);
+ gpio_cfg_pin(S5PC110_GPIO_H34, S5P_GPIO_INPUT);
+ gpio_set_pull(S5PC110_GPIO_H34, S5P_GPIO_PULL_UP);
- if (!s5p_gpio_get_value(&s5pc110_gpio->h3, 4)) {
- for (i = 0; i < 7; i++) {
- if (i == 2)
+ if (!gpio_get_value(S5PC110_GPIO_H34)) {
+ for (i = S5PC110_GPIO_G20; i < S5PC110_GPIO_G27; i++) {
+ if (i == S5PC110_GPIO_G22)
continue;
/* GPG2[0:6] special function 2 */
- s5p_gpio_cfg_pin(&s5pc110_gpio->g2, i, 0x2);
+ gpio_cfg_pin(i, 0x2);
/* GPG2[0:6] pull disable */
- s5p_gpio_set_pull(&s5pc110_gpio->g2, i, GPIO_PULL_NONE);
+ gpio_set_pull(i, S5P_GPIO_PULL_NONE);
/* GPG2[0:6] drv 4x */
- s5p_gpio_set_drv(&s5pc110_gpio->g2, i, GPIO_DRV_4X);
+ gpio_set_drv(i, S5P_GPIO_DRV_4X);
}
ret_sd = s5p_mmc_init(2, 4);