| commit | f5775e69cc201da6998dd992a93c1696e087d39a | [log] [tgz] |
|---|---|---|
| author | Marek Vasut <marex@denx.de> | Mon Aug 13 18:42:39 2018 +0200 |
| committer | Marek Vasut <marex@denx.de> | Mon Aug 13 22:35:16 2018 +0200 |
| tree | e37251adfa6c27e51385b69258b1e675990289bc | |
| parent | 6f96ed7e2080c305fa45e8b12d8013d8bab9ec5d [diff] |
ARM: dts: socfpga: Add missing UART resets The UART0 and UART1 resets are missing from DT, so the reset manager cannot control them. Add the missing DT reset entries. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>