ARM: tegra: pinmux: partially handle varying register layouts

Tegra210 moves some bits around in the pinmux registers. Update the code
to handle this.

This doesn't attempt to address the issues with the group-to-group varying
drive group register layout mentioned earlier. This patch handles the
SoC-to-SoC differences in the mux register layout.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
1 file changed