tree b490ec92a80da9b4ac464f4c3250d98216a85140
parent 3a539e0862e5ec996aaf7e2dfd8caa07a457bdd7
author Vasily Khoruzhick <anarsoul@gmail.com> 1677186212 -0800
committer Kever Yang <kever.yang@rock-chips.com> 1677578849 +0800

clk: rockchip: rk3568: add more supported clk rates for sdmmc and emmc

SDHCI driver may attempt to set 26MHz clock, but clk_rk3568
will return error in this case. Apparently, SDHCI silently ignores the
error and as a result eMMC initialization fails.

Add 25 MHz and 26 MHz clk rates for sdmmc and emmc on rk3568 to fix that.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>