board/t2080rdb: some update for t2080rdb

- update readme.
- add CONFIG_SYS_CORTINA_FW_IN_* for loading Cortina PHY CS4315
  ucode from NOR/NAND/SPI/SD/REMOTE.
- update cpld vbank with SW3[5:7]=000 as default vbank0 instead of
  previous SW3[5:7]=111 as default vbank.
- fix CONFIG_SYS_I2C_EEPROM_ADDR_LEN to 2.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
diff --git a/board/freescale/t208xrdb/README b/board/freescale/t208xrdb/README
index fe26de5..24484cd 100644
--- a/board/freescale/t208xrdb/README
+++ b/board/freescale/t208xrdb/README
@@ -67,7 +67,7 @@
      - One PCIe x2 end-point device (C293 Crypto co-processor)
  - IFC/Local Bus
      - NOR:  128MB 16-bit NOR Flash
-     - NAND: 512MB 8-bit NAND flash
+     - NAND: 1GB 8-bit NAND flash
      - CPLD: for system controlling with programable header on-board
  - SATA
      - Two SATA 2.0 onnectors on-board
@@ -156,11 +156,11 @@
    Switching between default bank and alternate bank on NOR flash
    To change boot source to vbank4:
 	via software:   run command 'cpld reset altbank' in u-boot.
-	via DIP-switch: set SW3[5:7] = '011'
+	via DIP-switch: set SW3[5:7] = '100'
 
    To change boot source to vbank0:
 	via software:   run command 'cpld reset' in u-boot.
-	via DIP-Switch: set SW3[5:7] = '111'
+	via DIP-Switch: set SW3[5:7] = '000'
 
 2. NAND Boot:
    a. build PBL image for NAND boot
diff --git a/board/freescale/t208xrdb/cpld.h b/board/freescale/t208xrdb/cpld.h
index 4cee4e5..3f15338 100644
--- a/board/freescale/t208xrdb/cpld.h
+++ b/board/freescale/t208xrdb/cpld.h
@@ -35,8 +35,8 @@
 #define CPLD_LBMAP_MASK		0x3F
 #define CPLD_BANK_SEL_MASK	0x07
 #define CPLD_BANK_OVERRIDE	0x40
-#define CPLD_LBMAP_ALTBANK	0x43 /* BANK OR | BANK 4 */
-#define CPLD_LBMAP_DFLTBANK	0x47 /* BANK OR | BANK 0 */
+#define CPLD_LBMAP_ALTBANK	0x44 /* BANK OR | BANK 4 */
+#define CPLD_LBMAP_DFLTBANK	0x40 /* BANK OR | BANK 0 */
 #define CPLD_LBMAP_RESET	0xFF
 #define CPLD_LBMAP_SHIFT	0x03
 #define CPLD_BOOT_SEL		0x80
diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c
index f3fec2a..265c1f9 100644
--- a/board/freescale/t208xrdb/t208xrdb.c
+++ b/board/freescale/t208xrdb/t208xrdb.c
@@ -44,7 +44,7 @@
 		puts("NAND\n");
 	} else {
 		reg = ((reg & CPLD_LBMAP_MASK) >> CPLD_LBMAP_SHIFT);
-		printf("NOR vBank%d\n", ~reg & 0x7);
+		printf("NOR vBank%d\n", reg);
 	}
 #endif