Merge branch 'lwmon5' of /home/wd/git/u-boot/projects
diff --git a/common/cmd_log.c b/common/cmd_log.c
index b9f9ba0..c6e72ac 100644
--- a/common/cmd_log.c
+++ b/common/cmd_log.c
@@ -107,7 +107,7 @@
if ((s = getenv ("loglevel")) != NULL)
console_loglevel = (int)simple_strtoul (s, NULL, 10);
- gd->post_log_word |= LOGBUFF_INITIALIZED;
+ gd->flags |= GD_FLG_LOGINIT;
}
void logbuff_reset (void)
@@ -168,7 +168,7 @@
void logbuff_log(char *msg)
{
- if ((gd->post_log_word & LOGBUFF_INITIALIZED)) {
+ if ((gd->flags & GD_FLG_LOGINIT)) {
logbuff_printk (msg);
} else {
/* Can happen only for pre-relocated errors as logging */
diff --git a/include/asm-arm/global_data.h b/include/asm-arm/global_data.h
index 0410b5e..7564ff1 100644
--- a/include/asm-arm/global_data.h
+++ b/include/asm-arm/global_data.h
@@ -61,6 +61,8 @@
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
+#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
+#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r8")
diff --git a/include/asm-avr32/global_data.h b/include/asm-avr32/global_data.h
index daf64bc..007cfe4 100644
--- a/include/asm-avr32/global_data.h
+++ b/include/asm-avr32/global_data.h
@@ -52,6 +52,8 @@
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
+#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
+#define GD_FLG_LOGINIT 0x00020 /* Log Buf has been initialized */
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm("r5")
diff --git a/include/asm-blackfin/global_data.h b/include/asm-blackfin/global_data.h
index 6debfc7..4c88639 100644
--- a/include/asm-blackfin/global_data.h
+++ b/include/asm-blackfin/global_data.h
@@ -62,6 +62,8 @@
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
+#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
+#define GD_FLG_LOGINIT 0x00020 /* Log Buf has been initialized */
#define DECLARE_GLOBAL_DATA_PTR register gd_t * volatile gd asm ("P5")
diff --git a/include/asm-i386/global_data.h b/include/asm-i386/global_data.h
index 68a9ad6..3235063 100644
--- a/include/asm-i386/global_data.h
+++ b/include/asm-i386/global_data.h
@@ -55,6 +55,8 @@
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
+#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
+#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
extern gd_t *global_data;
diff --git a/include/asm-m68k/global_data.h b/include/asm-m68k/global_data.h
index c897f2b..7377d31 100644
--- a/include/asm-m68k/global_data.h
+++ b/include/asm-m68k/global_data.h
@@ -73,6 +73,8 @@
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
+#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
+#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
#if 0
extern gd_t *global_data;
diff --git a/include/asm-microblaze/global_data.h b/include/asm-microblaze/global_data.h
index 91243b2..376786f 100644
--- a/include/asm-microblaze/global_data.h
+++ b/include/asm-microblaze/global_data.h
@@ -53,6 +53,8 @@
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
+#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
+#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r31")
diff --git a/include/asm-mips/global_data.h b/include/asm-mips/global_data.h
index bd9e4dd..0c0ba50 100644
--- a/include/asm-mips/global_data.h
+++ b/include/asm-mips/global_data.h
@@ -55,6 +55,8 @@
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
+#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
+#define GD_FLG_LOGINIT 0x00020 /* Log Buf has been initialized */
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("k0")
diff --git a/include/asm-nios/global_data.h b/include/asm-nios/global_data.h
index ddd66cf..a8cc987 100644
--- a/include/asm-nios/global_data.h
+++ b/include/asm-nios/global_data.h
@@ -46,6 +46,8 @@
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
+#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
+#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("%g7")
diff --git a/include/asm-nios2/global_data.h b/include/asm-nios2/global_data.h
index ae5f617..7290489 100644
--- a/include/asm-nios2/global_data.h
+++ b/include/asm-nios2/global_data.h
@@ -45,6 +45,8 @@
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
+#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
+#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("r15")
diff --git a/include/asm-ppc/global_data.h b/include/asm-ppc/global_data.h
index 202c844..ea70266 100644
--- a/include/asm-ppc/global_data.h
+++ b/include/asm-ppc/global_data.h
@@ -168,6 +168,8 @@
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
+#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
+#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
#if 1
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2")
diff --git a/include/asm-sh/global_data.h b/include/asm-sh/global_data.h
index 521a66f..69af24a 100644
--- a/include/asm-sh/global_data.h
+++ b/include/asm-sh/global_data.h
@@ -45,6 +45,8 @@
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
+#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
+#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("r13")
diff --git a/include/asm-sparc/global_data.h b/include/asm-sparc/global_data.h
index 7c29fc6..de2c84b 100644
--- a/include/asm-sparc/global_data.h
+++ b/include/asm-sparc/global_data.h
@@ -79,6 +79,9 @@
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
+#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
+#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
+#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("%g7")
diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h
index 1f669aa..cf406c8 100644
--- a/include/configs/lwmon5.h
+++ b/include/configs/lwmon5.h
@@ -88,15 +88,20 @@
/* unused GPT0 COMP reg */
#define CFG_MEM_TOP_HIDE (4 << 10) /* don't use last 4kbytes */
/* 440EPx errata CHIP 11 */
+#define CFG_OCM_SIZE (16 << 10)
/* Additional registers for watchdog timer post test */
#define CFG_WATCHDOG_TIME_ADDR (CFG_PERIPHERAL_BASE + GPT0_MASK2)
#define CFG_WATCHDOG_FLAGS_ADDR (CFG_PERIPHERAL_BASE + GPT0_MASK1)
#define CFG_DSPIC_TEST_ADDR CFG_WATCHDOG_FLAGS_ADDR
+#define CFG_OCM_STATUS_ADDR CFG_WATCHDOG_FLAGS_ADDR
#define CFG_WATCHDOG_MAGIC 0x12480000
#define CFG_WATCHDOG_MAGIC_MASK 0xFFFF0000
#define CFG_DSPIC_TEST_MASK 0x00000001
+#define CFG_OCM_STATUS_OK 0x00009A00
+#define CFG_OCM_STATUS_FAIL 0x0000A300
+#define CFG_OCM_STATUS_MASK 0x0000FF00
/*-----------------------------------------------------------------------
* Serial Port
@@ -162,6 +167,7 @@
CFG_POST_FPU | \
CFG_POST_I2C | \
CFG_POST_MEMORY | \
+ CFG_POST_OCM | \
CFG_POST_RTC | \
CFG_POST_SPR | \
CFG_POST_UART | \
diff --git a/include/logbuff.h b/include/logbuff.h
index d415729..d06d208 100644
--- a/include/logbuff.h
+++ b/include/logbuff.h
@@ -31,8 +31,6 @@
#define LOGBUFF_OVERHEAD (4096) /* Logbuffer overhead for extra info */
#define LOGBUFF_RESERVE (LOGBUFF_LEN+LOGBUFF_OVERHEAD)
-#define LOGBUFF_INITIALIZED (1<<31)
-
/* The mapping used here has to be the same as in setup_ext_logbuff ()
in linux/kernel/printk */
diff --git a/include/post.h b/include/post.h
index ee07d2c..123623f 100644
--- a/include/post.h
+++ b/include/post.h
@@ -43,6 +43,7 @@
#define POST_PREREL 0x1000 /* test runs before relocation */
#define POST_CRITICAL 0x2000 /* Use failbootcmd if test failed */
+#define POST_STOP 0x4000 /* Interrupt POST sequence on fail */
#define POST_MEM (POST_RAM | POST_ROM)
#define POST_ALWAYS (POST_NORMAL | \
@@ -94,7 +95,7 @@
#define CFG_POST_SPR 0x00000400
#define CFG_POST_SYSMON 0x00000800
#define CFG_POST_DSP 0x00001000
-#define CFG_POST_CODEC 0x00002000
+#define CFG_POST_OCM 0x00002000
#define CFG_POST_FPU 0x00004000
#define CFG_POST_ECC 0x00008000
#define CFG_POST_BSPEC1 0x00010000
@@ -102,6 +103,7 @@
#define CFG_POST_BSPEC3 0x00040000
#define CFG_POST_BSPEC4 0x00080000
#define CFG_POST_BSPEC5 0x00100000
+#define CFG_POST_CODEC 0x00200000
#endif /* CONFIG_POST */
diff --git a/post/cpu/ppc4xx/Makefile b/post/cpu/ppc4xx/Makefile
index f19dc5d..1cfd3bb 100644
--- a/post/cpu/ppc4xx/Makefile
+++ b/post/cpu/ppc4xx/Makefile
@@ -29,6 +29,7 @@
COBJS-$(CONFIG_HAS_POST) += denali_ecc.o
COBJS-$(CONFIG_HAS_POST) += ether.o
COBJS-$(CONFIG_HAS_POST) += fpu.o
+COBJS-$(CONFIG_HAS_POST) += ocm.o
COBJS-$(CONFIG_HAS_POST) += spr.o
COBJS-$(CONFIG_HAS_POST) += uart.o
COBJS-$(CONFIG_HAS_POST) += watchdog.o
diff --git a/post/cpu/ppc4xx/ocm.c b/post/cpu/ppc4xx/ocm.c
new file mode 100644
index 0000000..88aa93e
--- /dev/null
+++ b/post/cpu/ppc4xx/ocm.c
@@ -0,0 +1,89 @@
+/*
+ * (C) Copyright 2008 Ilya Yanok, EmCraft Systems, yanok@emcraft.com
+ *
+ * Developed for DENX Software Engineering GmbH
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+
+/*
+ * This test attempts to verify on-chip memory (OCM). Result is written
+ * to the scratch register and if test succeed it won't be run till next
+ * power on.
+ */
+
+#include <post.h>
+
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define OCM_TEST_PATTERN1 0x55555555
+#define OCM_TEST_PATTERN2 0xAAAAAAAA
+
+#if CONFIG_POST & CFG_POST_OCM
+
+static uint ocm_status_read(void)
+{
+ return in_be32((void *)CFG_OCM_STATUS_ADDR) &
+ CFG_OCM_STATUS_MASK;
+}
+
+static void ocm_status_write(uint value)
+{
+ out_be32((void *)CFG_OCM_STATUS_ADDR, value |
+ (in_be32((void *)CFG_OCM_STATUS_ADDR) &
+ ~CFG_OCM_STATUS_MASK));
+}
+
+static inline int ocm_test_word(uint value, uint *address)
+{
+ uint read_value;
+
+ *address = value;
+ sync();
+ read_value = *address;
+
+ return (read_value != value);
+}
+
+int ocm_post_test(int flags)
+{
+ uint old_value;
+ int ret = 0;
+ uint *address = (uint*)CFG_OCM_BASE;
+
+ if (ocm_status_read() == CFG_OCM_STATUS_OK)
+ return 0;
+ for (; address < (uint*)(CFG_OCM_BASE + CFG_OCM_SIZE); address++) {
+ old_value = *address;
+ if (ocm_test_word(OCM_TEST_PATTERN1, address) ||
+ ocm_test_word(OCM_TEST_PATTERN2, address)) {
+ ret = 1;
+ *address = old_value;
+ printf("OCM POST failed at %p!\n", address);
+ break;
+ }
+ *address = old_value;
+ }
+ ocm_status_write(ret ? CFG_OCM_STATUS_FAIL : CFG_OCM_STATUS_OK);
+ return ret;
+}
+#endif /* CONFIG_POST & CFG_POST_OCM */
diff --git a/post/post.c b/post/post.c
index c016c3a..d31829b 100644
--- a/post/post.c
+++ b/post/post.c
@@ -238,14 +238,20 @@
if (test_flags & POST_PREREL) {
if ((*test->test) (flags) == 0)
post_log_mark_succ ( test->testid );
- else if (test_flags & POST_CRITICAL)
- gd->flags |= GD_FLG_POSTFAIL;
+ else {
+ if (test_flags & POST_CRITICAL)
+ gd->flags |= GD_FLG_POSTFAIL;
+ if (test_flags & POST_STOP)
+ gd->flags |= GD_FLG_POSTSTOP;
+ }
} else {
if ((*test->test) (flags) != 0) {
post_log ("FAILED\n");
show_boot_progress (-32);
if (test_flags & POST_CRITICAL)
gd->flags |= GD_FLG_POSTFAIL;
+ if (test_flags & POST_STOP)
+ gd->flags |= GD_FLG_POSTSTOP;
}
else
post_log ("PASSED\n");
@@ -271,6 +277,9 @@
if (name == NULL) {
unsigned int last;
+ if (gd->flags & GD_FLG_POSTSTOP)
+ return 0;
+
if (post_bootmode_get (&last) & POST_POWERTEST) {
if (last & POST_FAIL_SAVE) {
last &= ~POST_FAIL_SAVE;
@@ -285,6 +294,8 @@
flags | POST_REBOOT, last);
for (i = last + 1; i < post_list_size; i++) {
+ if (gd->flags & GD_FLG_POSTSTOP)
+ break;
post_run_single (post_list + i,
test_flags[i],
flags, i);
@@ -292,6 +303,8 @@
}
} else {
for (i = 0; i < post_list_size; i++) {
+ if (gd->flags & GD_FLG_POSTSTOP)
+ break;
post_run_single (post_list + i,
test_flags[i],
flags, i);
diff --git a/post/tests.c b/post/tests.c
index 36473e3..a790c78 100644
--- a/post/tests.c
+++ b/post/tests.c
@@ -29,6 +29,7 @@
#include <post.h>
+extern int ocm_post_test (int flags);
extern int cache_post_test (int flags);
extern int watchdog_post_test (int flags);
extern int i2c_post_test (int flags);
@@ -60,6 +61,18 @@
struct post_test post_list[] =
{
+#if CONFIG_POST & CFG_POST_OCM
+ {
+ "OCM test",
+ "ocm",
+ "This test checks on chip memory (OCM).",
+ POST_ROM | POST_ALWAYS | POST_PREREL | POST_CRITICAL | POST_STOP,
+ &ocm_post_test,
+ NULL,
+ NULL,
+ CFG_POST_OCM
+ },
+#endif
#if CONFIG_POST & CFG_POST_CACHE
{
"Cache test",
@@ -270,7 +283,7 @@
#if CONFIG_POST & CFG_POST_BSPEC4
CONFIG_POST_BSPEC4,
#endif
-#if CONFIG_POST & CFG_POST_BSPEC4
+#if CONFIG_POST & CFG_POST_BSPEC5
CONFIG_POST_BSPEC5,
#endif
};