cmd_i2c: Provide option for bulk 'i2c write' in one transaction
I2C chips do exist that require a write of some multi-byte data to occur in
a single bus transaction (aka atomic transfer), otherwise either the write
does not come into effect at all, or normal operation of internal circuitry
cannot be guaranteed. The current implementation of the 'i2c write' command
(transfer of multiple bytes from a memory buffer) in fact performs a separate
transaction for each byte to be written and thus cannot support such types of
I2C slave devices.
This patch provides an alternative by allowing 'i2c write' to execute the
write transfer of the given number of bytes in a single bus transaction if
the '-s' option is specified as a final command argument. Else the current
re-addressing method is used.
Signed-off-by: Lubomir Popov <l-popov@ti.com>
hs: adapt to CONFIG_DM_I2C
diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c
index 62b0b48..ad38cbf 100644
--- a/common/cmd_i2c.c
+++ b/common/cmd_i2c.c
@@ -342,9 +342,10 @@
int ret;
#ifdef CONFIG_DM_I2C
struct udevice *dev;
+ struct dm_i2c_chip *i2c_chip;
#endif
- if (argc != 5)
+ if ((argc < 5) || (argc > 6))
return cmd_usage(cmdtp);
/*
@@ -367,7 +368,7 @@
return cmd_usage(cmdtp);
/*
- * Length is the number of objects, not number of bytes.
+ * Length is the number of bytes.
*/
length = simple_strtoul(argv[4], NULL, 16);
@@ -377,22 +378,47 @@
ret = i2c_set_chip_offset_len(dev, alen);
if (ret)
return i2c_report_err(ret, I2C_ERR_WRITE);
+ i2c_chip = dev_get_parent_platdata(dev);
+ if (!i2c_chip)
+ return i2c_report_err(ret, I2C_ERR_WRITE);
#endif
- while (length-- > 0) {
+ if (argc == 6 && !strcmp(argv[5], "-s")) {
+ /*
+ * Write all bytes in a single I2C transaction. If the target
+ * device is an EEPROM, it is your responsibility to not cross
+ * a page boundary. No write delay upon completion, take this
+ * into account if linking commands.
+ */
#ifdef CONFIG_DM_I2C
- ret = dm_i2c_write(dev, devaddr++, memaddr++, 1);
+ i2c_chip->flags &= ~DM_I2C_CHIP_WR_ADDRESS;
+ ret = dm_i2c_write(dev, devaddr, memaddr, length);
#else
- ret = i2c_write(chip, devaddr++, alen, memaddr++, 1);
+ ret = i2c_write(chip, devaddr, alen, memaddr, length);
#endif
if (ret)
return i2c_report_err(ret, I2C_ERR_WRITE);
+ } else {
+ /*
+ * Repeated addressing - perform <length> separate
+ * write transactions of one byte each
+ */
+ while (length-- > 0) {
+#ifdef CONFIG_DM_I2C
+ i2c_chip->flags |= DM_I2C_CHIP_WR_ADDRESS;
+ ret = dm_i2c_write(dev, devaddr++, memaddr++, 1);
+#else
+ ret = i2c_write(chip, devaddr++, alen, memaddr++, 1);
+#endif
+ if (ret)
+ return i2c_report_err(ret, I2C_ERR_WRITE);
/*
* No write delay with FRAM devices.
*/
#if !defined(CONFIG_SYS_I2C_FRAM)
- udelay(11000);
+ udelay(11000);
#endif
+ }
}
return 0;
}
@@ -1827,7 +1853,7 @@
U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""),
U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""),
U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""),
- U_BOOT_CMD_MKENT(write, 5, 0, do_i2c_write, "", ""),
+ U_BOOT_CMD_MKENT(write, 6, 0, do_i2c_write, "", ""),
#ifdef CONFIG_DM_I2C
U_BOOT_CMD_MKENT(flags, 2, 1, do_i2c_flags, "", ""),
#endif
@@ -1894,7 +1920,8 @@
"i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n"
"i2c probe [address] - test for and show device(s) on the I2C bus\n"
"i2c read chip address[.0, .1, .2] length memaddress - read to memory\n"
- "i2c write memaddress chip address[.0, .1, .2] length - write memory to i2c\n"
+ "i2c write memaddress chip address[.0, .1, .2] length [-s] - write memory\n"
+ " to I2C; the -s option selects bulk write in a single transaction\n"
#ifdef CONFIG_DM_I2C
"i2c flags chip [flags] - set or get chip flags\n"
#endif
@@ -1906,7 +1933,7 @@
#endif
U_BOOT_CMD(
- i2c, 6, 1, do_i2c,
+ i2c, 7, 1, do_i2c,
"I2C sub-system",
i2c_help_text
);