commit ed0c81c654209a2af71393e8756d94c7e944646b
author Peng Fan <Peng.Fan@freescale.com> Wed Dec 31 11:01:37 2014 +0800
committer Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Wed Dec 31 14:52:32 2014 +0530
tree 850d3c3b7e7b981b7c3abb3ec7ef281cf1723e75
parent 53e3db7f64a8e4289bc8accb87c2ec7fa546010a

QuadSPI: use correct amba_base

According cs, use different amba_base to choose the corresponding
flash devices.  If not, `sf probe 1:0` and `sf probe 1:1` will
choose the same flash device, but not different flash devices.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

drivers/spi/fsl_qspi.c

diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
index 61490c9..eae2f3a 100644
--- a/drivers/spi/fsl_qspi.c
+++ b/drivers/spi/fsl_qspi.c
@@ -194,12 +194,22 @@
 	if (bus >= ARRAY_SIZE(spi_bases))
 		return NULL;
 
+	if (cs >= FSL_QSPI_FLASH_NUM)
+		return NULL;
+
 	qspi = spi_alloc_slave(struct fsl_qspi, bus, cs);
 	if (!qspi)
 		return NULL;
 
 	qspi->reg_base = spi_bases[bus];
-	qspi->amba_base = amba_bases[bus];
+	/*
+	 * According cs, use different amba_base to choose the
+	 * corresponding flash devices.
+	 *
+	 * If not, only one flash device is used even if passing
+	 * different cs using `sf probe`
+	 */
+	qspi->amba_base = amba_bases[bus] + cs * FSL_QSPI_FLASH_SIZE;
 
 	qspi->slave.max_write_size = TX_BUFFER_SIZE;
 
@@ -212,10 +222,20 @@
 	qspi_write32(&regs->mcr, QSPI_MCR_RESERVED_MASK);
 
 	total_size = FSL_QSPI_FLASH_SIZE * FSL_QSPI_FLASH_NUM;
-	qspi_write32(&regs->sfa1ad, FSL_QSPI_FLASH_SIZE | qspi->amba_base);
-	qspi_write32(&regs->sfa2ad, FSL_QSPI_FLASH_SIZE | qspi->amba_base);
-	qspi_write32(&regs->sfb1ad, total_size | qspi->amba_base);
-	qspi_write32(&regs->sfb2ad, total_size | qspi->amba_base);
+	/*
+	 * Any read access to non-implemented addresses will provide
+	 * undefined results.
+	 *
+	 * In case single die flash devices, TOP_ADDR_MEMA2 and
+	 * TOP_ADDR_MEMB2 should be initialized/programmed to
+	 * TOP_ADDR_MEMA1 and TOP_ADDR_MEMB1 respectively - in effect,
+	 * setting the size of these devices to 0.  This would ensure
+	 * that the complete memory map is assigned to only one flash device.
+	 */
+	qspi_write32(&regs->sfa1ad, FSL_QSPI_FLASH_SIZE | amba_bases[bus]);
+	qspi_write32(&regs->sfa2ad, FSL_QSPI_FLASH_SIZE | amba_bases[bus]);
+	qspi_write32(&regs->sfb1ad, total_size | amba_bases[bus]);
+	qspi_write32(&regs->sfb2ad, total_size | amba_bases[bus]);
 
 	qspi_set_lut(qspi);