ARM: rmobile: Update H2 Stout

The H2 Stout port was broken since some time. This patch updates
the H2 Stout port to use modern frameworks, DM, DT probing, SPL
and TPL for the preloading and puts it on par with the M2 Porter
board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
diff --git a/include/configs/stout.h b/include/configs/stout.h
index b81103e..226bea8 100644
--- a/include/configs/stout.h
+++ b/include/configs/stout.h
@@ -17,14 +17,9 @@
 
 #include "rcar-gen2-common.h"
 
-/* STACK */
-#if defined(CONFIGF_RMOBILE_EXTRAM_BOOT)
-#define CONFIG_SYS_INIT_SP_ADDR		0xB003FFFC
-#else
-#define CONFIG_SYS_INIT_SP_ADDR		0xE827FFFC
-#endif
-#define STACK_AREA_SIZE			0xC000
-#define LOW_LEVEL_MERAM_STACK	\
+#define CONFIG_SYS_INIT_SP_ADDR		0x4f000000
+#define STACK_AREA_SIZE			0x00100000
+#define LOW_LEVEL_MERAM_STACK \
 		(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
 
 /* MEMORY */
@@ -43,47 +38,33 @@
 #define CONFIG_SH_ETHER_USE_PORT	0
 #define CONFIG_SH_ETHER_PHY_ADDR	0x1
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_ALIGNE_SIZE	64
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
+#define CONFIG_SH_ETHER_ALIGNE_SIZE	64
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
-/* I2C */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_RCAR
-#define CONFIG_SYS_RCAR_I2C0_SPEED	400000
-#define CONFIG_SYS_RCAR_I2C1_SPEED	400000
-#define CONFIG_SYS_RCAR_I2C2_SPEED	400000
-#define CONFIG_SYS_RCAR_I2C3_SPEED	400000
-#define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS	4
-
-#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
-
 /* Board Clock */
 #define RMOBILE_XTAL_CLK	20000000u
 #define CONFIG_SYS_CLK_FREQ	RMOBILE_XTAL_CLK
-#define CONFIG_SH_TMU_CLK_FREQ	(CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
-#define CONFIG_PLL1_CLK_FREQ	(CONFIG_SYS_CLK_FREQ * 156 / 2)
-#define CONFIG_PLL1_DIV2_CLK_FREQ	(CONFIG_PLL1_CLK_FREQ / 2)
-#define CONFIG_MP_CLK_FREQ	(CONFIG_PLL1_DIV2_CLK_FREQ / 15)
-#define CONFIG_HP_CLK_FREQ	(CONFIG_PLL1_CLK_FREQ / 12)
+#define CONFIG_SH_TMU_CLK_FREQ	(CONFIG_SYS_CLK_FREQ / 2)
 
 #define CONFIG_SYS_TMU_CLK_DIV	4
 
-/* USB */
-#define CONFIG_USB_EHCI_RMOBILE
-#define CONFIG_USB_MAX_CONTROLLER_COUNT	3
+#define CONFIG_EXTRA_ENV_SETTINGS	\
+	"fdt_high=0xffffffff\0"		\
+	"initrd_high=0xffffffff\0"
 
-/* Module stop status bits */
-/* INTC-RT */
-#define CONFIG_SMSTP0_ENA	0x00400000
-/* MSIF, SCIFA0 */
-#define CONFIG_SMSTP2_ENA	0x00002010
-/* INTC-SYS, IRQC */
-#define CONFIG_SMSTP4_ENA	0x00000180
+/* SPL support */
+#define CONFIG_SPL_TEXT_BASE		0xe6304000
+#define CONFIG_SPL_STACK		0xe6340000
+#define CONFIG_SPL_MAX_SIZE		0x40000
+#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x140000
 
-/* SDHI */
-#define CONFIG_SH_SDHI_FREQ	97500000
+/* TPL support */
+#ifdef CONFIG_TPL_BUILD
+#define CONFIG_CONS_SCIFA0
+#define CONFIG_SH_SCIF_CLK_FREQ		52000000
+#endif
 
 #endif	/* __STOUT_H */