armv7: rename cache related CONFIG flags
Replace the cache related CONFIG flags with more meaningful
names. Following are the changes:
CONFIG_L2_OFF -> CONFIG_SYS_L2CACHE_OFF
CONFIG_SYS_NO_ICACHE -> CONFIG_SYS_ICACHE_OFF
CONFIG_SYS_NO_DCACHE -> CONFIG_SYS_DCACHE_OFF
Signed-off-by: Aneesh V <aneesh@ti.com>
V2:
* Changed CONFIG_L2_OFF -> CONFIG_SYS_NO_L2CACHE
V4:
* Changed all three flags to the final names suggested as above
and accordingly changed the commit message
diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index 3c5f3ef..200a800 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -512,10 +512,10 @@
.align 5
.global arm1136_cache_flush
arm1136_cache_flush:
-#if !defined(CONFIG_SYS_NO_ICACHE)
+#if !defined(CONFIG_SYS_ICACHE_OFF)
mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
#endif
-#if !defined(CONFIG_SYS_NO_DCACHE)
+#if !defined(CONFIG_SYS_DCACHE_OFF)
mcr p15, 0, r1, c7, c14, 0 @ invalidate D cache
#endif
mov pc, lr @ back to caller
diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index a01e0d6..bc4238f 100644
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -35,9 +35,6 @@
#include <command.h>
#include <asm/system.h>
#include <asm/cache.h>
-#ifndef CONFIG_L2_OFF
-#include <asm/arch/sys_proto.h>
-#endif
static void cache_flush(void);
diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h
index ef9959e..26b41b4 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -70,7 +70,7 @@
unsigned long irq_sp; /* irq stack pointer */
unsigned long start_addr_sp; /* start_addr_stackpointer */
unsigned long reloc_off;
-#if !(defined(CONFIG_SYS_NO_ICACHE) && defined(CONFIG_SYS_NO_DCACHE))
+#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
unsigned long tlb_addr;
#endif
void **jt; /* jump table */
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 03b1b5e..f993d74 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -39,9 +39,7 @@
COBJS-y += board.o
COBJS-y += bootm.o
COBJS-y += cache.o
-ifndef CONFIG_SYS_NO_CP15_CACHE
COBJS-y += cache-cp15.o
-endif
COBJS-y += interrupts.o
COBJS-y += reset.o
SOBJS-$(CONFIG_USE_ARCH_MEMSET) += memset.o
diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
index 169dfeb..4f88f58 100644
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
@@ -326,7 +326,7 @@
debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
#endif /* CONFIG_PRAM */
-#if !(defined(CONFIG_SYS_NO_ICACHE) && defined(CONFIG_SYS_NO_DCACHE))
+#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
/* reserve TLB table */
addr -= (4096 * 4);
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index d9175f0..ba73fb9 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -24,7 +24,7 @@
#include <common.h>
#include <asm/system.h>
-#if !(defined(CONFIG_SYS_NO_ICACHE) && defined(CONFIG_SYS_NO_DCACHE))
+#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
#define CACHE_SETUP 0x1a
@@ -118,7 +118,7 @@
}
#endif
-#ifdef CONFIG_SYS_NO_ICACHE
+#ifdef CONFIG_SYS_ICACHE_OFF
void icache_enable (void)
{
return;
@@ -150,7 +150,7 @@
}
#endif
-#ifdef CONFIG_SYS_NO_DCACHE
+#ifdef CONFIG_SYS_DCACHE_OFF
void dcache_enable (void)
{
return;