| commit | dfe08374943c0e898fcfaf7327f69e0fb56b7d23 | [log] [tgz] |
|---|---|---|
| author | Heinrich Schuchardt <heinrich.schuchardt@canonical.com> | Mon Sep 04 13:24:04 2023 +0200 |
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | Tue Sep 05 10:53:55 2023 +0800 |
| tree | dba6f74cca2f0eb5726d838795b08fe87c7276bd | |
| parent | d14222e7c152e36bf7d370c2623242a22fb9e821 [diff] |
risc-v: implement DBCN based debug console Use the DBCN SBI extension to implement a debug console. Make it the default for S-mode RISC-V. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>