commit dcf846d5dae75b81eccce46c577fd3957e73d474
author TENART Antoine <atenart@adeneo-embedded.com> Tue Jul 02 12:05:59 2013 +0200
committer Tom Rini <trini@ti.com> Thu Aug 15 18:38:37 2013 -0400
tree a407cd99afb98ec46ce48dae285041fc986038e4
parent 9ed6e41239e17c97d786219b5ffca4a8a118c71f

Add TI816X support

Signed-off-by: Antoine Tenart <atenart@adeneo-embedded.com>
[trini: Fix warnings about vtp things in emif4.c, adapt AM43XX]
Signed-off-by: Tom Rini <trini@ti.com>

arch/arm/cpu/armv7/am33xx/emif4.c

diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c b/arch/arm/cpu/armv7/am33xx/emif4.c
index 21cefd4..59ad25c 100644
--- a/arch/arm/cpu/armv7/am33xx/emif4.c
+++ b/arch/arm/cpu/armv7/am33xx/emif4.c
@@ -40,9 +40,11 @@
 static struct dmm_lisa_map_regs *hw_lisa_map_regs =
 				(struct dmm_lisa_map_regs *)DMM_BASE;
 #endif
+#ifndef CONFIG_TI816X
 static struct vtp_reg *vtpreg[2] = {
 				(struct vtp_reg *)VTP0_CTRL_ADDR,
 				(struct vtp_reg *)VTP1_CTRL_ADDR};
+#endif
 #ifdef CONFIG_AM33XX
 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR;
 #endif
@@ -64,6 +66,7 @@
 }
 #endif
 
+#ifndef CONFIG_TI816X
 static void config_vtp(int nr)
 {
 	writel(readl(&vtpreg[nr]->vtp0ctrlreg) | VTP_CTRL_ENABLE,
@@ -78,6 +81,7 @@
 			VTP_CTRL_READY)
 		;
 }
+#endif
 
 void __weak ddr_pll_config(unsigned int ddrpll_m)
 {
@@ -88,7 +92,9 @@
 		const struct emif_regs *regs, int nr)
 {
 	ddr_pll_config(pll);
+#ifndef CONFIG_TI816X
 	config_vtp(nr);
+#endif
 	config_cmd_ctrl(ctrl, nr);
 
 	config_ddr_data(data, nr);