sunxi: H3: Add support for the host usb-phys
Add support for phy 1-3.
Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
[hdegoede@redhat.com: use setclrbits_le32 instead of read-modify-write]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c
index d494ca1..cf3dcc4 100644
--- a/drivers/usb/host/ehci-sunxi.c
+++ b/drivers/usb/host/ehci-sunxi.c
@@ -35,13 +35,12 @@
* This should go away once we've moved to the driver model for
* clocks resp. phys.
*/
- if (hccr == (void *)SUNXI_USB1_BASE) {
- priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
- priv->phy_index = 1;
- } else {
- priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI1;
- priv->phy_index = 2;
- }
+ priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
+#ifdef CONFIG_MACH_SUN8I_H3
+ priv->ahb_gate_mask |= 1 << AHB_GATE_OFFSET_USB_OHCI0;
+#endif
+ priv->phy_index = ((u32)hccr - SUNXI_USB1_BASE) / 0x1000 + 1;
+ priv->ahb_gate_mask <<= priv->phy_index - 1;
setbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask);
#ifdef CONFIG_SUNXI_GEN_SUN6I
@@ -83,6 +82,7 @@
{ .compatible = "allwinner,sun6i-a31-ehci", },
{ .compatible = "allwinner,sun7i-a20-ehci", },
{ .compatible = "allwinner,sun8i-a23-ehci", },
+ { .compatible = "allwinner,sun8i-h3-ehci", },
{ .compatible = "allwinner,sun9i-a80-ehci", },
{ }
};
diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
index 6079272..1b1f651 100644
--- a/drivers/usb/host/ohci-sunxi.c
+++ b/drivers/usb/host/ohci-sunxi.c
@@ -37,15 +37,14 @@
* This should go away once we've moved to the driver model for
* clocks resp. phys.
*/
- if (regs == (void *)(SUNXI_USB1_BASE + 0x400)) {
- priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0;
- priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
- priv->phy_index = 1;
- } else {
- priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI1;
- priv->usb_gate_mask = CCM_USB_CTRL_OHCI1_CLK;
- priv->phy_index = 2;
- }
+ priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0;
+#ifdef CONFIG_MACH_SUN8I_H3
+ priv->ahb_gate_mask |= 1 << AHB_GATE_OFFSET_USB_EHCI0;
+#endif
+ priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
+ priv->phy_index = ((u32)regs - (SUNXI_USB1_BASE + 0x400)) / 0x1000 + 1;
+ priv->ahb_gate_mask <<= priv->phy_index - 1;
+ priv->usb_gate_mask <<= priv->phy_index - 1;
setbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask);
setbits_le32(&ccm->usb_clk_cfg, priv->usb_gate_mask);
@@ -86,6 +85,7 @@
{ .compatible = "allwinner,sun6i-a31-ohci", },
{ .compatible = "allwinner,sun7i-a20-ohci", },
{ .compatible = "allwinner,sun8i-a23-ohci", },
+ { .compatible = "allwinner,sun8i-h3-ohci", },
{ .compatible = "allwinner,sun9i-a80-ohci", },
{ }
};