diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile
index fe851f1..6ae113a 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -64,10 +64,16 @@
 
 COBJS-$(CONFIG_CPM2)	+= ether_fcc.o
 COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
+COBJS-$(CONFIG_FSL_CORENET) += liodn.o
 COBJS-$(CONFIG_MP)	+= mp.o
 COBJS-$(CONFIG_MPC8536) += mpc8536_serdes.o
 COBJS-$(CONFIG_P1022)	+= p1022_serdes.o
 COBJS-$(CONFIG_PCI)	+= pci.o
+COBJS-$(CONFIG_FSL_CORENET) += portals.o
+
+# various SoC specific assignments
+COBJS-$(CONFIG_PPC_P4080) += p4080_ids.o
+
 COBJS-$(CONFIG_QE)	+= qe_io.o
 COBJS-$(CONFIG_CPM2)	+= serial_scc.o
 
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 6c5fb36..8e7b827 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -29,6 +29,7 @@
 #include <asm/processor.h>
 #include <linux/ctype.h>
 #include <asm/io.h>
+#include <asm/fsl_portals.h>
 #ifdef CONFIG_FSL_ESDHC
 #include <fsl_esdhc.h>
 #endif
@@ -446,4 +447,18 @@
 #endif
 
 	ft_fixup_dpaa_clks(blob);
+
+#if defined(CONFIG_SYS_BMAN_MEM_PHYS)
+	fdt_portal(blob, "fsl,bman-portal", "bman-portals",
+			(u64)CONFIG_SYS_BMAN_MEM_PHYS,
+			CONFIG_SYS_BMAN_MEM_SIZE);
+#endif
+
+#if defined(CONFIG_SYS_QMAN_MEM_PHYS)
+	fdt_portal(blob, "fsl,qman-portal", "qman-portals",
+			(u64)CONFIG_SYS_QMAN_MEM_PHYS,
+			CONFIG_SYS_QMAN_MEM_SIZE);
+
+	fdt_fixup_qportals(blob);
+#endif
 }
diff --git a/arch/powerpc/cpu/mpc85xx/liodn.c b/arch/powerpc/cpu/mpc85xx/liodn.c
new file mode 100644
index 0000000..bd19094
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/liodn.c
@@ -0,0 +1,187 @@
+/*
+ * Copyright 2008-2010 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <libfdt.h>
+#include <fdt_support.h>
+
+#include <asm/immap_85xx.h>
+#include <asm/io.h>
+#include <asm/processor.h>
+#include <asm/fsl_portals.h>
+#include <asm/fsl_liodn.h>
+
+int get_dpaa_liodn(enum fsl_dpaa_dev dpaa_dev, u32 *liodns, int liodn_offset)
+{
+	liodns[0] = liodn_bases[dpaa_dev].id[0] + liodn_offset;
+
+	if (liodn_bases[dpaa_dev].num_ids == 2)
+		liodns[1] = liodn_bases[dpaa_dev].id[1] + liodn_offset;
+
+	return liodn_bases[dpaa_dev].num_ids;
+}
+
+static void set_liodn(struct liodn_id_table *tbl, int size)
+{
+	int i;
+
+	for (i = 0; i < size; i++) {
+		u32 liodn;
+		if (tbl[i].num_ids == 2) {
+			liodn = (tbl[i].id[0] << 16) | tbl[i].id[1];
+		} else {
+			liodn = tbl[i].id[0];
+		}
+
+		out_be32((volatile u32 *)(tbl[i].reg_offset), liodn);
+	}
+}
+
+static void setup_sec_liodn_base(void)
+{
+	ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
+	u32 base;
+
+	if (!IS_E_PROCESSOR(get_svr()))
+		return;
+
+	/* QILCR[QSLOM] */
+	out_be32(&sec->qilcr_ms, 0x3ff<<16);
+
+	base = (liodn_bases[FSL_HW_PORTAL_SEC].id[0] << 16) |
+		liodn_bases[FSL_HW_PORTAL_SEC].id[1];
+
+	out_be32(&sec->qilcr_ls, base);
+}
+
+#ifdef CONFIG_SYS_DPAA_FMAN
+static void setup_fman_liodn_base(enum fsl_dpaa_dev dev,
+				  struct liodn_id_table *tbl, int size)
+{
+	int i;
+	ccsr_fman_t *fm;
+	u32 base;
+
+	switch(dev) {
+	case FSL_HW_PORTAL_FMAN1:
+		fm = (void *)CONFIG_SYS_FSL_FM1_ADDR;
+		break;
+
+#if (CONFIG_SYS_NUM_FMAN == 2)
+	case FSL_HW_PORTAL_FMAN2:
+		fm = (void *)CONFIG_SYS_FSL_FM2_ADDR;
+		break;
+#endif
+	default:
+		printf("Error: Invalid device type to %s\n", __FUNCTION__);
+		return ;
+	}
+
+	base = (liodn_bases[dev].id[0] << 16) | liodn_bases[dev].id[0];
+
+	/* setup all bases the same */
+	for (i = 0; i < 32; i++) {
+		out_be32(&fm->fm_dma.fmdmplr[i], base);
+	}
+
+	/* update tbl to ... */
+	for (i = 0; i < size; i++)
+		tbl[i].id[0] += liodn_bases[dev].id[0];
+}
+#endif
+
+static void setup_pme_liodn_base(void)
+{
+#ifdef CONFIG_SYS_DPAA_PME
+	ccsr_pme_t *pme = (void *)CONFIG_SYS_FSL_CORENET_PME_ADDR;
+	u32 base = (liodn_bases[FSL_HW_PORTAL_PME].id[0] << 16) |
+			liodn_bases[FSL_HW_PORTAL_PME].id[1];
+
+	out_be32(&pme->liodnbr, base);
+#endif
+}
+
+void set_liodns(void)
+{
+	/* setup general liodn offsets */
+	set_liodn(liodn_tbl, liodn_tbl_sz);
+
+	/* setup SEC block liodn bases & offsets if we have one */
+	if (IS_E_PROCESSOR(get_svr())) {
+		set_liodn(sec_liodn_tbl, sec_liodn_tbl_sz);
+		setup_sec_liodn_base();
+	}
+
+	/* setup FMAN block(s) liodn bases & offsets if we have one */
+#ifdef CONFIG_SYS_DPAA_FMAN
+	set_liodn(fman1_liodn_tbl, fman1_liodn_tbl_sz);
+	setup_fman_liodn_base(FSL_HW_PORTAL_FMAN1, fman1_liodn_tbl,
+				fman1_liodn_tbl_sz);
+
+#if (CONFIG_SYS_NUM_FMAN == 2)
+	set_liodn(fman2_liodn_tbl, fman2_liodn_tbl_sz);
+	setup_fman_liodn_base(FSL_HW_PORTAL_FMAN2, fman2_liodn_tbl,
+				fman2_liodn_tbl_sz);
+#endif
+#endif
+	/* setup PME liodn base */
+	setup_pme_liodn_base();
+}
+
+static void fdt_fixup_liodn_tbl(void *blob, struct liodn_id_table *tbl, int sz)
+{
+	int i;
+
+	for (i = 0; i < sz; i++) {
+		int off;
+
+		if (tbl[i].compat == NULL)
+			continue;
+
+		off = fdt_node_offset_by_compat_reg(blob,
+				tbl[i].compat, tbl[i].compat_offset);
+		if (off >= 0) {
+			off = fdt_setprop(blob, off, "fsl,liodn",
+				&tbl[i].id[0],
+				sizeof(u32) * tbl[i].num_ids);
+			if (off > 0)
+				printf("WARNING unable to set fsl,liodn for "
+					"%s: %s\n",
+					tbl[i].compat, fdt_strerror(off));
+		} else {
+			debug("WARNING: could not set fsl,liodn for %s: %s.\n",
+					tbl[i].compat, fdt_strerror(off));
+		}
+	}
+}
+
+void fdt_fixup_liodn(void *blob)
+{
+	fdt_fixup_liodn_tbl(blob, liodn_tbl, liodn_tbl_sz);
+#ifdef CONFIG_SYS_DPAA_FMAN
+	fdt_fixup_liodn_tbl(blob, fman1_liodn_tbl, fman1_liodn_tbl_sz);
+#if (CONFIG_SYS_NUM_FMAN == 2)
+	fdt_fixup_liodn_tbl(blob, fman2_liodn_tbl, fman2_liodn_tbl_sz);
+#endif
+#endif
+	fdt_fixup_liodn_tbl(blob, sec_liodn_tbl, sec_liodn_tbl_sz);
+}
diff --git a/arch/powerpc/cpu/mpc85xx/p4080_ids.c b/arch/powerpc/cpu/mpc85xx/p4080_ids.c
new file mode 100644
index 0000000..3861146
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/p4080_ids.c
@@ -0,0 +1,115 @@
+/*
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/fsl_portals.h>
+#include <asm/fsl_liodn.h>
+
+struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
+	/* dqrr liodn, frame data liodn, liodn off, sdest */
+	SET_QP_INFO( 1,  2,  1, 0),
+	SET_QP_INFO( 3,  4,  2, 1),
+	SET_QP_INFO( 5,  6,  3, 2),
+	SET_QP_INFO( 7,  8,  4, 3),
+	SET_QP_INFO( 9, 10,  5, 4),
+	SET_QP_INFO(11, 12,  6, 5),
+	SET_QP_INFO(13, 14,  7, 6),
+	SET_QP_INFO(15, 16,  8, 7),
+	SET_QP_INFO(17, 18,  9, 0), /* for now sdest to 0 */
+	SET_QP_INFO(19, 20, 10, 0), /* for now sdest to 0 */
+};
+
+struct liodn_id_table liodn_tbl[] = {
+	SET_USB_LIODN(1, "fsl-usb2-mph", 127),
+	SET_USB_LIODN(2, "fsl-usb2-dr", 157),
+
+	SET_SDHC_LIODN(1, 156),
+
+	SET_PCI_LIODN(1, 193),
+	SET_PCI_LIODN(2, 194),
+	SET_PCI_LIODN(3, 195),
+
+	SET_DMA_LIODN(1, 196),
+	SET_DMA_LIODN(2, 197),
+
+	SET_GUTS_LIODN("fsl,rapidio-delta", 198, rio1liodnr, 0),
+	SET_GUTS_LIODN(NULL, 199, rio2liodnr, 0),
+	SET_GUTS_LIODN(NULL, 200, rmuliodnr, 0),
+
+	SET_QMAN_LIODN(31),
+	SET_BMAN_LIODN(32),
+	SET_PME_LIODN(128),
+};
+
+#ifdef CONFIG_SYS_DPAA_FMAN
+struct liodn_id_table fman1_liodn_tbl[] = {
+	SET_FMAN_RX_1G_LIODN(1, 0, 11),
+	SET_FMAN_RX_1G_LIODN(1, 1, 12),
+	SET_FMAN_RX_1G_LIODN(1, 2, 13),
+	SET_FMAN_RX_1G_LIODN(1, 3, 14),
+	SET_FMAN_RX_10G_LIODN(1, 0, 15),
+};
+
+#if (CONFIG_SYS_NUM_FMAN == 2)
+struct liodn_id_table fman2_liodn_tbl[] = {
+	SET_FMAN_RX_1G_LIODN(2, 0, 16),
+	SET_FMAN_RX_1G_LIODN(2, 1, 17),
+	SET_FMAN_RX_1G_LIODN(2, 2, 18),
+	SET_FMAN_RX_1G_LIODN(2, 3, 19),
+	SET_FMAN_RX_10G_LIODN(2, 0, 20),
+};
+#endif
+#endif
+
+struct liodn_id_table sec_liodn_tbl[] = {
+	SET_SEC_JQ_LIODN_ENTRY(0, 146, 154),
+	SET_SEC_JQ_LIODN_ENTRY(1, 147, 155),
+	SET_SEC_JQ_LIODN_ENTRY(2, 178, 186),
+	SET_SEC_JQ_LIODN_ENTRY(3, 179, 187),
+	SET_SEC_RTIC_LIODN_ENTRY(a, 144),
+	SET_SEC_RTIC_LIODN_ENTRY(b, 145),
+	SET_SEC_RTIC_LIODN_ENTRY(c, 176),
+	SET_SEC_RTIC_LIODN_ENTRY(d, 177),
+	SET_SEC_DECO_LIODN_ENTRY(0, 129, 161),
+	SET_SEC_DECO_LIODN_ENTRY(1, 130, 162),
+	SET_SEC_DECO_LIODN_ENTRY(2, 131, 163),
+	SET_SEC_DECO_LIODN_ENTRY(3, 132, 164),
+	SET_SEC_DECO_LIODN_ENTRY(4, 133, 165),
+};
+
+struct liodn_id_table liodn_bases[] = {
+	[FSL_HW_PORTAL_SEC]  = SET_LIODN_BASE_2(96, 106),
+#ifdef CONFIG_SYS_DPAA_FMAN
+	[FSL_HW_PORTAL_FMAN1] = SET_LIODN_BASE_1(32),
+#if (CONFIG_SYS_NUM_FMAN == 2)
+	[FSL_HW_PORTAL_FMAN2] = SET_LIODN_BASE_1(64),
+#endif
+#endif
+#ifdef CONFIG_SYS_DPAA_PME
+	[FSL_HW_PORTAL_PME]   = SET_LIODN_BASE_2(116, 133),
+#endif
+};
+
+int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
+int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);
+int fman2_liodn_tbl_sz = ARRAY_SIZE(fman2_liodn_tbl);
+int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);
diff --git a/arch/powerpc/cpu/mpc85xx/portals.c b/arch/powerpc/cpu/mpc85xx/portals.c
new file mode 100644
index 0000000..01aec6e
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/portals.c
@@ -0,0 +1,238 @@
+/*
+ * Copyright 2008-2010 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <libfdt.h>
+#include <fdt_support.h>
+
+#include <asm/processor.h>
+#include <asm/io.h>
+
+#include <asm/fsl_portals.h>
+#include <asm/fsl_liodn.h>
+
+static ccsr_qman_t *qman = (void *)CONFIG_SYS_FSL_CORENET_QMAN_ADDR;
+
+void setup_portals(void)
+{
+	int i;
+
+	/* Set the Qman initiator BAR to match the LAW (for DQRR stashing) */
+#ifdef CONFIG_PHYS_64BIT
+	out_be32(&qman->qcsp_bare, (u32)(CONFIG_SYS_QMAN_MEM_PHYS >> 32));
+#endif
+	out_be32(&qman->qcsp_bar, (u32)CONFIG_SYS_QMAN_MEM_PHYS);
+
+	for (i = 0; i < CONFIG_SYS_QMAN_NUM_PORTALS; i++) {
+		u8 sdest = qp_info[i].sdest;
+		u16 fliodn = qp_info[i].fliodn;
+		u16 dliodn = qp_info[i].dliodn;
+		u16 liodn_off = qp_info[i].liodn_offset;
+
+		out_be32(&qman->qcsp[i].qcsp_lio_cfg, (liodn_off << 16) |
+					dliodn);
+		/* set frame liodn */
+		out_be32(&qman->qcsp[i].qcsp_io_cfg, (sdest << 16) | fliodn);
+	}
+}
+
+/* Update portal containter to match LAW setup of portal in phy map */
+void fdt_portal(void *blob, const char *compat, const char *container,
+			u64 addr, u32 size)
+{
+	int off;
+
+	off = fdt_node_offset_by_compatible(blob, -1, compat);
+	if (off < 0)
+		return ;
+
+	off = fdt_parent_offset(blob, off);
+	/* if non-zero assume we have a container */
+	if (off > 0) {
+		char buf[60];
+		const char *p, *name;
+		u32 *range;
+		int len;
+
+		/* fixup ranges */
+		range = fdt_getprop_w(blob, off, "ranges", &len);
+		if (range == NULL) {
+			printf("ERROR: container for %s has no ranges", compat);
+			return ;
+		}
+
+		range[0] = 0;
+		if (len == 16) {
+			range[1] = addr >> 32;
+			range[2] = addr & 0xffffffff;
+			range[3] = size;
+		} else {
+			range[1] = addr & 0xffffffff;
+			range[2] = size;
+		}
+		fdt_setprop_inplace(blob, off, "ranges", range, len);
+
+		/* fixup the name */
+		name = fdt_get_name(blob, off, &len);
+		p = memchr(name, '@', len);
+
+		if (p)
+			len = p - name;
+
+		/* if we are given a container name check it
+		 * against what we found, if it doesnt match exit out */
+		if (container && (memcmp(container, name, len))) {
+			printf("WARNING: container names didn't match %s %s\n",
+				container, name);
+			return ;
+		}
+
+		memcpy(&buf, name, len);
+		len += sprintf(&buf[len], "@%llx", addr);
+		fdt_set_name(blob, off, buf);
+		return ;
+	}
+
+	printf("ERROR: %s isn't in a container.  Not supported\n", compat);
+}
+
+static int fdt_qportal(void *blob, int off, int id, char *name,
+		       enum fsl_dpaa_dev dev, int create)
+{
+	int childoff, dev_off, num, ret = 0;
+	uint32_t dev_handle;
+	u32 liodns[2];
+
+	childoff = fdt_subnode_offset(blob, off, name);
+	if (create) {
+		if (childoff <= 0)
+			childoff = fdt_add_subnode(blob, off, name);
+
+		if (childoff > 0) {
+			char handle[64], *p;
+
+			strncpy(handle, name, sizeof(handle));
+			p = strchr(handle, '@');
+			if (!strncmp(name, "fman", 4)) {
+				*p = *(p + 1);
+				p++;
+			}
+			*p = '\0';
+
+			dev_off = fdt_path_offset(blob, handle);
+			if (dev_off < 0)
+				return dev_off;
+
+			dev_handle = fdt_get_phandle(blob, dev_off);
+			if (dev_handle <= 0) {
+				dev_handle = fdt_alloc_phandle(blob);
+				fdt_setprop_cell(blob, dev_off,
+					"linux,phandle", dev_handle);
+			}
+
+			ret = fdt_setprop(blob, childoff, "dev-handle",
+					  &dev_handle, sizeof(dev_handle));
+			if (ret < 0)
+				return ret;
+
+			num = get_dpaa_liodn(dev, &liodns[0], id);
+			ret = fdt_setprop(blob, childoff, "fsl,liodn",
+					  &liodns[0], sizeof(u32) * num);
+		} else {
+			return childoff;
+		}
+	} else {
+		if (childoff > 0)
+			ret = fdt_del_node(blob, childoff);
+	}
+
+	return ret;
+}
+
+void fdt_fixup_qportals(void *blob)
+{
+	int off, err;
+	unsigned int maj, min;
+	u32 rev_1 = in_be32(&qman->ip_rev_1);
+	char compat[64];
+	int compat_len;
+
+	maj = (rev_1 >> 8) & 0xff;
+	min = rev_1 & 0xff;
+
+	compat_len = sprintf(compat, "fsl,qman-portal-%u.%u", maj, min) + 1;
+	compat_len += sprintf(compat + compat_len, "fsl,qman-portal") + 1;
+
+	off = fdt_node_offset_by_compatible(blob, -1, "fsl,qman-portal");
+	while (off != -FDT_ERR_NOTFOUND) {
+		u32 liodns[2];
+		const int *ci = fdt_getprop(blob, off, "cell-index", NULL);
+		int j, i = *ci;
+
+		err = fdt_setprop(blob, off, "compatible", compat, compat_len);
+		if (err < 0)
+			goto err;
+
+		liodns[0] = qp_info[i].dliodn;
+		liodns[1] = qp_info[i].fliodn;
+
+		err = fdt_setprop(blob, off, "fsl,liodn",
+				  &liodns, sizeof(u32) * 2);
+		if (err < 0)
+			goto err;
+
+		i++;
+
+		err = fdt_qportal(blob, off, i, "crypto@0", FSL_HW_PORTAL_SEC,
+				  IS_E_PROCESSOR(get_svr()));
+		if (err < 0)
+			goto err;
+
+#ifdef CONFIG_SYS_DPAA_PME
+		err = fdt_qportal(blob, off, i, "pme@0", FSL_HW_PORTAL_PME, 1);
+		if (err < 0)
+			goto err;
+#else
+		fdt_qportal(blob, off, i, "pme@0", FSL_HW_PORTAL_PME, 0);
+#endif
+#ifdef CONFIG_SYS_DPAA_FMAN
+		for (j = 0; j < CONFIG_SYS_NUM_FMAN; j++) {
+			char name[] = "fman@0";
+
+			name[sizeof(name) - 2] = '0' + j;
+			err = fdt_qportal(blob, off, i, name,
+					  FSL_HW_PORTAL_FMAN1 + j, 1);
+			if (err < 0)
+				goto err;
+		}
+#endif
+
+err:
+		if (err < 0) {
+			printf("ERROR: unable to create props for %s: %s\n",
+				fdt_get_name(blob, off, NULL), fdt_strerror(err));
+			return;
+		}
+
+		off = fdt_node_offset_by_compatible(blob, off, "fsl,qman-portal");
+	}
+}
diff --git a/arch/powerpc/include/asm/fsl_liodn.h b/arch/powerpc/include/asm/fsl_liodn.h
new file mode 100644
index 0000000..acdc99a
--- /dev/null
+++ b/arch/powerpc/include/asm/fsl_liodn.h
@@ -0,0 +1,142 @@
+/*
+ * Copyright 2009-2010 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _FSL_LIODN_H_
+#define _FSL_LIODN_H_
+
+#include <asm/types.h>
+
+struct liodn_id_table {
+	const char * compat;
+	u32 id[2];
+	u8 num_ids;
+	phys_addr_t compat_offset;
+	unsigned long reg_offset;
+};
+
+extern u32 get_ppid_liodn(int ppid_tbl_idx, int ppid);
+extern void set_liodns(void);
+extern void fdt_fixup_liodn(void *blob);
+
+#define SET_LIODN_BASE_1(idA) \
+	{ .id = { idA }, .num_ids = 1, }
+
+#define SET_LIODN_BASE_2(idA, idB) \
+	{ .id = { idA, idB }, .num_ids = 2 }
+
+#define SET_LIODN_ENTRY_1(name, idA, off, compatoff) \
+	{ .compat = name, \
+	  .id = { idA }, .num_ids = 1, \
+	  .reg_offset = off + CONFIG_SYS_CCSRBAR, \
+	  .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \
+	}
+
+#define SET_LIODN_ENTRY_2(name, idA, idB, off, compatoff) \
+	{ .compat = name, \
+	  .id = { idA, idB }, .num_ids = 2, \
+	  .reg_offset = off + CONFIG_SYS_CCSRBAR, \
+	  .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \
+	}
+
+#define SET_GUTS_LIODN(compat, liodn, name, compatoff) \
+	SET_LIODN_ENTRY_1(compat, liodn, \
+		offsetof(ccsr_gur_t, name) + CONFIG_SYS_MPC85xx_GUTS_OFFSET, \
+		compatoff)
+
+#define SET_USB_LIODN(usbNum, compat, liodn) \
+	SET_GUTS_LIODN(compat, liodn, usb##usbNum##liodnr,\
+		CONFIG_SYS_MPC85xx_USB##usbNum##_OFFSET)
+
+#define SET_SATA_LIODN(sataNum, liodn) \
+	SET_GUTS_LIODN("fsl,pq-sata-v2", liodn, sata##sataNum##liodnr,\
+		CONFIG_SYS_MPC85xx_SATA##sataNum##_OFFSET)
+
+#define SET_PCI_LIODN(pciNum, liodn) \
+	SET_GUTS_LIODN("fsl,p4080-pcie", liodn, pex##pciNum##liodnr,\
+		CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET)
+
+/* reg nodes for DMA start @ 0x300 */
+#define SET_DMA_LIODN(dmaNum, liodn) \
+	SET_GUTS_LIODN("fsl,eloplus-dma", liodn, dma##dmaNum##liodnr,\
+		CONFIG_SYS_MPC85xx_DMA##dmaNum##_OFFSET + 0x300)
+
+#define SET_SDHC_LIODN(sdhcNum, liodn) \
+	SET_GUTS_LIODN("fsl,esdhc", liodn, sdmmc##sdhcNum##liodnr,\
+		CONFIG_SYS_MPC85xx_ESDHC_OFFSET)
+
+#define SET_QMAN_LIODN(liodn) \
+	SET_LIODN_ENTRY_1("fsl,qman", liodn, offsetof(ccsr_qman_t, liodnr) + \
+		CONFIG_SYS_FSL_CORENET_QMAN_OFFSET, \
+		CONFIG_SYS_FSL_CORENET_QMAN_OFFSET)
+
+#define SET_BMAN_LIODN(liodn) \
+	SET_LIODN_ENTRY_1("fsl,bman", liodn, offsetof(ccsr_bman_t, liodnr) + \
+		CONFIG_SYS_FSL_CORENET_BMAN_OFFSET, \
+		CONFIG_SYS_FSL_CORENET_BMAN_OFFSET)
+
+#define SET_PME_LIODN(liodn) \
+	SET_LIODN_ENTRY_1("fsl,pme", liodn, offsetof(ccsr_pme_t, liodnr) + \
+		CONFIG_SYS_FSL_CORENET_PME_OFFSET, \
+		CONFIG_SYS_FSL_CORENET_PME_OFFSET)
+
+/* -1 from portID due to how immap has the registers */
+#define FM_PPID_RX_PORT_OFFSET(fmNum, portID) \
+	CONFIG_SYS_FSL_FM##fmNum##_OFFSET + \
+	offsetof(struct ccsr_fman, fm_bmi_common.fmbm_ppid[portID - 1])
+
+/* enetNum is 0, 1, 2... so we + 8 for 1g to get to HW Port ID */
+#define SET_FMAN_RX_1G_LIODN(fmNum, enetNum, liodn) \
+	SET_LIODN_ENTRY_1("fsl,fman-port-1g-rx", liodn, \
+		FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \
+		CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_1G_OFFSET) \
+
+/* enetNum is 0, 1, 2... so we + 16 for 10g to get to HW Port ID */
+#define SET_FMAN_RX_10G_LIODN(fmNum, enetNum, liodn) \
+	SET_LIODN_ENTRY_1("fsl,fman-port-10g-rx", liodn, \
+		FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 16), \
+		CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_10G_OFFSET) \
+
+#define SET_SEC_JQ_LIODN_ENTRY(jqNum, liodnA, liodnB) \
+	SET_LIODN_ENTRY_2("fsl,sec4.0-job-queue", liodnA, liodnB,\
+		offsetof(ccsr_sec_t, jqliodnr[jqNum].ls) + \
+		CONFIG_SYS_FSL_SEC_OFFSET, \
+		CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jqNum)
+
+/* This is a bit evil since we treat rtic param as both a string & hex value */
+#define SET_SEC_RTIC_LIODN_ENTRY(rtic, liodnA) \
+	SET_LIODN_ENTRY_1("fsl,sec4.0-rtic-memory", \
+		liodnA,	\
+		offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
+		CONFIG_SYS_FSL_SEC_OFFSET, \
+		CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa))
+
+#define SET_SEC_DECO_LIODN_ENTRY(num, liodnA, liodnB) \
+	SET_LIODN_ENTRY_2(NULL, liodnA, liodnB, \
+		offsetof(ccsr_sec_t, decoliodnr[num].ls) + \
+		CONFIG_SYS_FSL_SEC_OFFSET, 0)
+
+extern struct liodn_id_table liodn_tbl[], liodn_bases[], sec_liodn_tbl[];
+extern struct liodn_id_table fman1_liodn_tbl[], fman2_liodn_tbl[];
+extern int liodn_tbl_sz, sec_liodn_tbl_sz;
+extern int fman1_liodn_tbl_sz, fman2_liodn_tbl_sz;
+
+#endif
diff --git a/arch/powerpc/include/asm/fsl_portals.h b/arch/powerpc/include/asm/fsl_portals.h
new file mode 100644
index 0000000..cb32927
--- /dev/null
+++ b/arch/powerpc/include/asm/fsl_portals.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright 2009-2010 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _FSL_PORTALS_H_
+#define _FSL_PORTALS_H_
+
+/* entries must be in order and contiguous */
+enum fsl_dpaa_dev {
+	FSL_HW_PORTAL_SEC,
+#ifdef CONFIG_SYS_DPAA_FMAN
+	FSL_HW_PORTAL_FMAN1,
+#if (CONFIG_SYS_NUM_FMAN == 2)
+	FSL_HW_PORTAL_FMAN2,
+#endif
+#endif
+#ifdef CONFIG_SYS_DPAA_PME
+	FSL_HW_PORTAL_PME,
+#endif
+};
+
+struct qportal_info {
+	u16	dliodn;	/* DQRR LIODN */
+	u16	fliodn;	/* frame data LIODN */
+	u16	liodn_offset;
+	u8	sdest;
+};
+
+#define SET_QP_INFO(dqrr, fdata, off, dest) \
+	{ .dliodn = dqrr, .fliodn = fdata, .liodn_offset = off, .sdest = dest }
+
+extern int get_dpaa_liodn(enum fsl_dpaa_dev dpaa_dev,
+			  u32 *liodns, int liodn_offset);
+extern void setup_portals(void);
+extern void fdt_fixup_qportals(void *blob);
+
+extern struct qportal_info qp_info[];
+extern void fdt_portal(void *blob, const char *compat, const char *container,
+			u64 addr, u32 size);
+
+#endif