Merge with /home/wd/git/u-boot/master
diff --git a/CHANGELOG b/CHANGELOG
index f0c1eed..b0ff46e 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -12,6 +12,11 @@
 * Add NAND FLASH support for AMCC Bamboo 440EP eval board
   Patch by Stefan Roese, 11 Aug 2005
 
+* Add configuration for IFM AEV FIFO board.
+  Minor coding style cleanup.
+
+* Add configuration for IFM SPI eval board
+
 * Fix CompactFlash problem on HMI1001 board
 
 * Make new "mtdparts" code build with older compilers
diff --git a/Makefile b/Makefile
index fa7251b..7731f0b 100644
--- a/Makefile
+++ b/Makefile
@@ -231,6 +231,9 @@
 ## MPC5xxx Systems
 #########################################################################
 
+aev_config: unconfig
+	@./mkconfig -a aev ppc mpc5xxx tqm5200
+
 hmi1001_config:         unconfig
 	@./mkconfig hmi1001 ppc mpc5xxx hmi1001
 
diff --git a/board/tqm5200/tqm5200.c b/board/tqm5200/tqm5200.c
index 43d89b0..90275ec 100644
--- a/board/tqm5200/tqm5200.c
+++ b/board/tqm5200/tqm5200.c
@@ -250,6 +250,10 @@
 
 int checkboard (void)
 {
+#if defined (CONFIG_AEVFIFO)
+	puts ("Board: AEVFIFO\n");
+	return 0;
+#endif
 #if defined (CONFIG_TQM5200_AA)
 	puts ("Board: TQM5200-AA (TQ-Components GmbH)\n");
 #elif defined (CONFIG_TQM5200_AB)
diff --git a/common/cmd_ace.c b/common/cmd_ace.c
index 54fb918..fb4d358 100644
--- a/common/cmd_ace.c
+++ b/common/cmd_ace.c
@@ -31,7 +31,7 @@
  * available to cmd_fat.c:get_dev and filling in a block device
  * description that has all the bits needed for FAT support to
  * read sectors.
- * 
+ *
  * According to Xilinx technical support, before accessing the
  * SystemACE CF you need to set the following control bits:
  * 	FORCECFGMODE : 1
diff --git a/common/cmd_flash.c b/common/cmd_flash.c
index 5ad4226..d5be30c 100644
--- a/common/cmd_flash.c
+++ b/common/cmd_flash.c
@@ -534,7 +534,7 @@
 
 		return rcode;
 	}
-	
+
 #if (CONFIG_COMMANDS & CFG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
 	/* protect on/off <part-id> */
 	if ((argc == 3) && (id_parse(argv[2], NULL, &dev_type, &dev_num) == 0)) {
diff --git a/common/cmd_fpga.c b/common/cmd_fpga.c
index 0c0643c..c4b7392 100644
--- a/common/cmd_fpga.c
+++ b/common/cmd_fpga.c
@@ -137,9 +137,9 @@
 			__FUNCTION__);
 		return FPGA_FAIL;
 	}
-	swapsize = ((unsigned int) *dataptr     <<24) + 
-	           ((unsigned int) *(dataptr+1) <<16) + 
-	           ((unsigned int) *(dataptr+2) <<8 ) + 
+	swapsize = ((unsigned int) *dataptr     <<24) +
+	           ((unsigned int) *(dataptr+1) <<16) +
+	           ((unsigned int) *(dataptr+2) <<8 ) +
 	           ((unsigned int) *(dataptr+3)     ) ;
 	dataptr+=4;
 	printf("  bytes in bitstream = %d\n", swapsize);
@@ -217,7 +217,7 @@
 		PRINTF ("%s: device = %d\n", __FUNCTION__, dev);
 		/* FIXME - this is a really weak test */
 		if ((argc == 3) && (dev > fpga_count ())) {	/* must be buffer ptr */
-			PRINTF ("%s: Assuming buffer pointer in arg 3\n", 
+			PRINTF ("%s: Assuming buffer pointer in arg 3\n",
 				__FUNCTION__);
 			fpga_data = (void *) dev;
 			PRINTF ("%s: fpga_data = 0x%x\n",
diff --git a/common/cmd_jffs2.c b/common/cmd_jffs2.c
index 7f5ebf9..16f5b7a 100644
--- a/common/cmd_jffs2.c
+++ b/common/cmd_jffs2.c
@@ -45,7 +45,7 @@
  * partition  := <part-id>
  * <part-id>  := <dev-id>,part_num
  *
- * 
+ *
  * 'mtdids' - linux kernel mtd device id <-> u-boot device id mapping
  *
  * mtdids=<idmap>[,<idmap>,...]
@@ -403,7 +403,7 @@
 		return device_del(dev);
 
 	/* otherwise just delete this partition */
-	
+
 	if (dev == current_dev) {
 		/* we are modyfing partitions for the current device,
 		 * update current */
@@ -416,7 +416,7 @@
 				current_partnum = 0;
 				current_save();
 			} else if (part->offset <= curr_pi->offset) {
-				current_partnum--; 
+				current_partnum--;
 				current_save();
 			}
 		}
@@ -471,7 +471,7 @@
 		list_add(&part->link, &dev->parts);
 		return 0;
 	}
-		
+
 	new_pi = list_entry(&part->link, struct part_info, link);
 
 	/* get current partition info if we are updating current device */
@@ -492,7 +492,7 @@
 
 		if (new_pi->offset <= pi->offset) {
 			list_add_tail(&part->link, entry);
-			
+
 			if (curr_pi && (pi->offset <= curr_pi->offset)) {
 				/* we are modyfing partitions for the current
 				 * device, update current */
@@ -516,7 +516,7 @@
  */
 static int part_add(struct mtd_device *dev, struct part_info *part)
 {
-	/* verify alignment and size */	
+	/* verify alignment and size */
 	if (part_validate(dev->id, part) != 0)
 		return 1;
 
@@ -565,14 +565,14 @@
 		}
 	}
 
-        /* check for offset */
+	/* check for offset */
 	offset = OFFSET_NOT_SPECIFIED;
 	if (*p == '@') {
 		p++;
 		offset = memsize_parse(p, &p);
 	}
 
-        /* now look for the name */
+	/* now look for the name */
 	if (*p == '(') {
 		name = ++p;
 		if ((p = strchr(name, ')')) == NULL) {
@@ -591,7 +591,7 @@
 		name = NULL;
 	}
 
-        /* test for options */
+	/* test for options */
 	mask_flags = 0;
 	if (strncmp(p, "ro", 2) == 0) {
 		mask_flags |= MTD_WRITEABLE;
@@ -823,8 +823,8 @@
 		printf("invalid mtd device '%.*s'\n", mtd_id_len - 1, mtd_id);
 		return 1;
 	}
-	
-	DEBUGF("dev type = %d (%s), dev num = %d, mtd-id = %s\n", 
+
+	DEBUGF("dev type = %d (%s), dev num = %d, mtd-id = %s\n",
 			id->type, MTD_DEV_TYPE(id->type),
 			id->num, id->mtd_id);
 	pend = strchr(p, ';');
@@ -836,7 +836,7 @@
 
 	offset = 0;
 	if ((dev = device_find(id->type, id->num)) != NULL) {
-		/* if device already exists start at the end of the last partition */ 
+		/* if device already exists start at the end of the last partition */
 		part = list_entry(dev->parts.prev, struct part_info, link);
 		offset = part->offset + part->size;
 	}
@@ -852,7 +852,7 @@
 		else
 			offset = part->offset;
 
-		/* verify alignment and size */	
+		/* verify alignment and size */
 		if (part_validate(id, part) != 0)
 			break;
 
@@ -885,7 +885,7 @@
 		} else {
 			printf("unexpected character '%c' at the end of device\n", *p);
 			*ret = NULL;
-			return 1;		
+			return 1;
 		}
 	}
 
@@ -939,7 +939,7 @@
 {
 	struct list_head *entry;
 	struct mtdids *id;
-	
+
 	list_for_each(entry, &mtdids) {
 		id = list_entry(entry, struct mtdids, link);
 
@@ -951,7 +951,7 @@
 }
 
 /**
- * Search global mtdids list and find id of a requested mtd_id. 
+ * Search global mtdids list and find id of a requested mtd_id.
  *
  * Note: first argument is not null terminated.
  *
@@ -963,7 +963,7 @@
 {
 	struct list_head *entry;
 	struct mtdids *id;
-	
+
 	DEBUGF("--- id_find_by_mtd_id: '%.*s' (len = %d)\n",
 			mtd_id_len, mtd_id, mtd_id_len);
 
@@ -1045,13 +1045,13 @@
 		buf[0] = '\0';
 		return 0;
 	}
-	
+
 	sprintf(p, "mtdparts=");
 	p += 9;
 
 	list_for_each(dentry, &devices) {
 		dev = list_entry(dentry, struct mtd_device, link);
-		
+
 		/* copy mtd_id */
 		len = strlen(dev->id->mtd_id) + 1;
 		if (len > maxlen)
@@ -1078,8 +1078,8 @@
 			memcpy(p, tmpbuf, len);
 			p += len;
 			maxlen -= len;
-			
-			
+
+
 			/* add offset only when there is a gap between
 			 * partitions */
 			if ((!prev_part && (offset != 0)) ||
@@ -1107,7 +1107,7 @@
 				*(p++) = ')';
 				maxlen -= len;
 			}
-			
+
 			/* ro mask flag */
 			if (part->mask_flags && MTD_WRITEABLE) {
 				len = 2;
@@ -1188,7 +1188,7 @@
 				MTD_DEV_TYPE(dev->id->type), dev->id->num,
 				dev->id->mtd_id, dev->num_parts);
 		printf(" #: name\t\t\tsize\t\toffset\t\tmask_flags\n");
-		
+
 		/* list partitions for given device */
 		part_num = 0;
 		list_for_each(pentry, &dev->parts) {
@@ -1256,7 +1256,7 @@
 		printf("unexpected trailing character '%c'\n", *p);
 		return 1;
 	}
-	
+
 	if ((*dev = device_find(type, dnum)) == NULL) {
 		printf("no such device %s%d\n", MTD_DEV_TYPE(type), dnum);
 		return 1;
@@ -1328,7 +1328,7 @@
 
 	/* re-read 'mtdparts' variable, devices_init may be updating env */
 	p = getenv("mtdparts");
-	
+
 	if (strncmp(p, "mtdparts=", 9) != 0) {
 		printf("mtdparts variable doesn't start with 'mtdparts='\n");
 		return err;
@@ -1615,7 +1615,7 @@
 
 /**
  * Parse and initialize global mtdids mapping and create global
- * device/partition list. 
+ * device/partition list.
  *
  * @return 0 on success, 1 otherwise
  */
@@ -1870,7 +1870,7 @@
 	/* make sure we are in sync with env variables */
 	if (mtdparts_init() !=0)
 		return 1;
-	
+
 	if ((part = jffs2_part_info(current_dev, current_partnum))){
 
 		/* check partition type for cramfs */
@@ -1968,7 +1968,7 @@
 		list_partitions();
 		return 0;
 	}
-	
+
 	/* mtdparts add <mtd-dev> <size>[@<offset>] <name> [ro] */
 	if (((argc == 5) || (argc == 6)) && (strcmp(argv[1], "add") == 0)) {
 #define PART_ADD_DESC_MAXLEN 64
@@ -1998,7 +1998,7 @@
 			return 1;
 		}
 		sprintf(tmpbuf, "%s:%s(%s)%s",
-				id->mtd_id, argv[3], argv[4], argv[5] ? argv[5] : ""); 
+				id->mtd_id, argv[3], argv[4], argv[5] ? argv[5] : "");
 		DEBUGF("add tmpbuf: %s\n", tmpbuf);
 
 		if ((device_parse(tmpbuf, NULL, &dev) != 0) || (!dev))
diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c
index 5180107..667ae15 100644
--- a/fs/jffs2/jffs2_1pass.c
+++ b/fs/jffs2/jffs2_1pass.c
@@ -278,13 +278,13 @@
 
 
 /*
- * Generic jffs2 raw memory and node read routines. 
+ * Generic jffs2 raw memory and node read routines.
  *
  */
 static inline void *get_fl_mem(u32 off, u32 size, void *ext_buf)
 {
 	struct mtdids *id = current_part->dev->id;
-	
+
 #if (CONFIG_COMMANDS & CFG_CMD_FLASH)
 	if (id->type == MTD_DEV_TYPE_NOR)
 		return get_fl_mem_nor(off);
@@ -302,7 +302,7 @@
 static inline void *get_node_mem(u32 off)
 {
 	struct mtdids *id = current_part->dev->id;
-	
+
 #if (CONFIG_COMMANDS & CFG_CMD_FLASH)
 	if (id->type == MTD_DEV_TYPE_NOR)
 		return get_node_mem_nor(off);
diff --git a/include/configs/NETTA.h b/include/configs/NETTA.h
index 3573b37..1bcd88d 100644
--- a/include/configs/NETTA.h
+++ b/include/configs/NETTA.h
@@ -694,7 +694,7 @@
 /* No command line, one static partition, whole device */
 #undef CONFIG_JFFS2_CMDLINE
 #define CONFIG_JFFS2_DEV		"nand0"
-#define CONFIG_JFFS2_PART_SIZE		0x00100000 
+#define CONFIG_JFFS2_PART_SIZE		0x00100000
 #define CONFIG_JFFS2_PART_OFFSET	0x00200000
 
 /* mtdparts command line support */
diff --git a/include/configs/aev.h b/include/configs/aev.h
new file mode 100644
index 0000000..ca6e52b
--- /dev/null
+++ b/include/configs/aev.h
@@ -0,0 +1,401 @@
+/*
+ * (C) Copyright 2003-2005
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2004-2005
+ * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+
+#define CONFIG_MPC5xxx		1	/* This is an MPC5xxx CPU */
+#define CONFIG_MPC5200		1	/* (more precisely an MPC5200 CPU) */
+#define CONFIG_TQM5200		1	/* ... on TQM5200 module */
+#undef CONFIG_TQM5200_REV100		/*  define for revision 100 modules */
+#define CONFIG_STK52XX		1	/* ... on a STK52XX base board */
+#define CONFIG_STK52XX_REV100	1	/*  define for revision 100 baseboards */
+#define CONFIG_AEVFIFO		1
+#define CFG_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz */
+
+#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH  */
+#define BOOTFLAG_WARM		0x02	/* Software reboot	     */
+
+#define CFG_CACHELINE_SIZE	32	/* For MPC5xxx CPUs */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#  define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value */
+#endif
+
+/*
+ * Serial console configuration
+ */
+#define CONFIG_PSC_CONSOLE	1	/* console is on PSC1 */
+#define CONFIG_BAUDRATE		115200	/* ... at 115200 bps */
+#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
+
+/*
+ * PCI Mapping:
+ * 0x40000000 - 0x4fffffff - PCI Memory
+ * 0x50000000 - 0x50ffffff - PCI IO Space
+ */
+#ifdef CONFIG_AEVFIFO
+#define CONFIG_PCI		1
+#define CONFIG_PCI_PNP		1
+/* #define CONFIG_PCI_SCAN_SHOW	1 */
+
+#define CONFIG_PCI_MEM_BUS	0x40000000
+#define CONFIG_PCI_MEM_PHYS	CONFIG_PCI_MEM_BUS
+#define CONFIG_PCI_MEM_SIZE	0x10000000
+
+#define CONFIG_PCI_IO_BUS	0x50000000
+#define CONFIG_PCI_IO_PHYS	CONFIG_PCI_IO_BUS
+#define CONFIG_PCI_IO_SIZE	0x01000000
+
+#define CONFIG_NET_MULTI	1
+#define CONFIG_EEPRO100		1
+#define CFG_RX_ETH_BUFFER	8  /* use 8 rx buffer on eepro100  */
+#define CONFIG_NS8382X		1
+#endif	/* CONFIG_AEVFIFO */
+
+/* Partitions */
+#define CONFIG_MAC_PARTITION
+#define CONFIG_DOS_PARTITION
+#define CONFIG_ISO_PARTITION
+
+/* POST support */
+#define CONFIG_POST		(CFG_POST_MEMORY   | \
+				 CFG_POST_CPU	   | \
+				 CFG_POST_I2C)
+
+#ifdef CONFIG_POST
+#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
+/* preserve space for the post_word at end of on-chip SRAM */
+#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
+#else
+#define CFG_CMD_POST_DIAG 0
+#endif
+
+/*
+ * Supported commands
+ */
+#define CONFIG_COMMANDS	       (CONFIG_CMD_DFL	| \
+				ADD_BMP_CMD	| \
+				CFG_CMD_PCI	| \
+				CFG_CMD_ASKENV	| \
+				CFG_CMD_DATE	| \
+				CFG_CMD_DHCP	| \
+				CFG_CMD_ECHO	| \
+				CFG_CMD_EEPROM	| \
+				CFG_CMD_I2C	| \
+				CFG_CMD_MII	| \
+				CFG_CMD_NFS	| \
+				CFG_CMD_PING	| \
+				CFG_CMD_POST_DIAG | \
+				CFG_CMD_REGINFO | \
+				CFG_CMD_SNTP	)
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#define	CONFIG_TIMESTAMP		/* display image timestamps */
+
+#if (TEXT_BASE == 0xFC000000)		/* Boot low */
+#   define CFG_LOWBOOT		1
+#endif
+
+/*
+ * Autobooting
+ */
+#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds */
+
+#define CONFIG_PREBOOT	"echo;" \
+	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+	"echo"
+
+#undef	CONFIG_BOOTARGS
+
+#define CONFIG_EXTRA_ENV_SETTINGS					\
+	"netdev=eth0\0"							\
+	"rootpath=/opt/eldk/ppc_6xx\0"					\
+	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
+	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
+		"nfsroot=$(serverip):$(rootpath) "			\
+		"console=ttyS0,$(baudrate)\0"				\
+	"addip=setenv bootargs $(bootargs) "				\
+		"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)"	\
+		":$(hostname):$(netdev):off panic=1\0"			\
+	"flash_self=run ramargs addip;"					\
+		"bootm $(kernel_addr) $(ramdisk_addr)\0"		\
+	"flash_nfs=run nfsargs addip;"					\
+		"bootm $(kernel_addr)\0"				\
+	"net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0"	\
+	"bootfile=/tftpboot/tqm5200/uImage\0"				\
+	"load=tftp 200000 $(u-boot)\0"					\
+	"u-boot=/tftpboot/tqm5200/u-boot.bin\0"				\
+	"update=protect off FC000000 FC05FFFF;"				\
+		"erase FC000000 FC05FFFF;"				\
+		"cp.b 200000 FC000000 $(filesize);"			\
+		"protect on FC000000 FC05FFFF\0"			\
+	""
+
+#define CONFIG_BOOTCOMMAND	"run net_nfs"
+
+/*
+ * IPB Bus clocking configuration.
+ */
+#define CFG_IPBSPEED_133		/* define for 133MHz speed */
+
+#if defined(CFG_IPBSPEED_133)
+/*
+ * PCI Bus clocking configuration
+ *
+ * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
+ * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
+ * been tested with a IPB Bus Clock of 66 MHz.
+ */
+#define CFG_PCISPEED_66			/* define for 66MHz speed */
+#endif
+
+/*
+ * I2C configuration
+ */
+#define CONFIG_HARD_I2C		1	/* I2C with hardware support */
+#ifdef CONFIG_TQM5200_REV100
+#define CFG_I2C_MODULE		1	/* Select I2C module #1 for rev. 100 board */
+#else
+#define CFG_I2C_MODULE		2	/* Select I2C module #2 for all other revs */
+#endif
+
+/*
+ * I2C clock frequency
+ *
+ * Please notice, that the resulting clock frequency could differ from the
+ * configured value. This is because the I2C clock is derived from system
+ * clock over a frequency divider with only a few divider values. U-boot
+ * calculates the best approximation for CFG_I2C_SPEED. However the calculated
+ * approximation allways lies below the configured value, never above.
+ */
+#define CFG_I2C_SPEED		100000 /* 100 kHz */
+#define CFG_I2C_SLAVE		0x7F
+
+/*
+ * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
+ * also). For other EEPROMs configuration should be verified. On Mini-FAP the
+ * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
+ * same configuration could be used.
+ */
+#define CFG_I2C_EEPROM_ADDR		0x50	/* 1010000x */
+#define CFG_I2C_EEPROM_ADDR_LEN		2
+#define CFG_EEPROM_PAGE_WRITE_BITS	5	/* =32 Bytes per write */
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS	20
+
+/*
+ * Flash configuration
+ */
+#define CFG_FLASH_BASE		TEXT_BASE /* 0xFC000000 */
+
+/* use CFI flash driver if no module variant is spezified */
+#define CFG_FLASH_CFI		1	/* Flash is CFI conformant */
+#define CFG_FLASH_CFI_DRIVER	1	/* Use the common driver */
+#define CFG_FLASH_BANKS_LIST	{ CFG_BOOTCS_START }
+#define CFG_FLASH_EMPTY_INFO
+#define CFG_FLASH_SIZE		0x04000000 /* 64 MByte */
+#define CFG_MAX_FLASH_SECT	512	/* max num of sects on one chip */
+#undef CFG_FLASH_USE_BUFFER_WRITE	/* not supported yet for AMD */
+
+#if !defined(CFG_LOWBOOT)
+#define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x00760000 + 0x00800000)
+#else	/* CFG_LOWBOOT */
+#define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x00060000)
+#endif	/* CFG_LOWBOOT */
+#define CFG_MAX_FLASH_BANKS	1	/* max num of flash banks
+					   (= chip selects) */
+#define CFG_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)	*/
+#define CFG_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (in ms)	*/
+
+
+/*
+ * Environment settings
+ */
+#define CFG_ENV_IS_IN_FLASH	1
+#define CFG_ENV_SIZE		0x10000
+#define CFG_ENV_SECT_SIZE	0x20000
+#define CFG_ENV_ADDR_REDUND	(CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
+#define	CFG_ENV_SIZE_REDUND	(CFG_ENV_SIZE)
+
+/*
+ * Memory map
+ */
+#define CFG_MBAR		0xF0000000
+#define CFG_SDRAM_BASE		0x00000000
+#define CFG_DEFAULT_MBAR	0x80000000
+
+/* Use ON-Chip SRAM until RAM will be available */
+#define CFG_INIT_RAM_ADDR	MPC5XXX_SRAM
+#ifdef CONFIG_POST
+/* preserve space for the post_word at end of on-chip SRAM */
+#define CFG_INIT_RAM_END	MPC5XXX_SRAM_POST_SIZE
+#else
+#define CFG_INIT_RAM_END	MPC5XXX_SRAM_SIZE
+#endif
+
+
+#define CFG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET
+
+#define CFG_MONITOR_BASE	TEXT_BASE
+#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
+#   define CFG_RAMBOOT		1
+#endif
+
+#define CFG_MONITOR_LEN		(384 << 10)	/* Reserve 384 kB for Monitor	*/
+#define CFG_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()	*/
+#define CFG_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
+
+/*
+ * Ethernet configuration
+ */
+#define CONFIG_MPC5xxx_FEC	1
+/*
+ * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
+ */
+/* #define CONFIG_FEC_10MBIT 1 */
+#define CONFIG_PHY_ADDR		0x00
+
+/*
+ * GPIO configuration
+ *
+ * use pin gpio_wkup_6 as second SDRAM chip select (mem_cs1):
+ *	Bit 0 (mask: 0x80000000): 1
+ * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
+ *	00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
+ *	01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
+ *	      Use for REV200 STK52XX boards. Do not use with REV100 modules
+ *	      (because, there I2C1 is used as I2C bus)
+ * use PSC1 as UART: Bits 28-31 (mask: 0x00000007): 0100
+ * use PSC2 as CAN: Bits 25:27 (mask: 0x00000030)
+ *	000 -> All PSC2 pins are GIOPs
+ *	001 -> CAN1/2 on PSC2 pins
+ *	       Use for REV100 STK52xx boards
+ * use PSC6:
+ *   on STK52xx:
+ *	use as UART. Pins PSC6_0 to PSC6_3 are used.
+ *	Bits 9:11 (mask: 0x00700000):
+ *	   101 -> PSC6 : Extended POST test is not available
+ *   on MINI-FAP and TQM5200_IB:
+ *	use PSC6_0 to PSC6_3 as GPIO: Bits 9:11 (mask: 0x00700000):
+ *	   000 -> PSC6 could not be used as UART, CODEC or IrDA
+ *   GPIO on PSC6_3 is used in post_hotkeys_pressed() to enable extended POST
+ *   tests.
+ */
+#define CFG_GPS_PORT_CONFIG	0x81500014
+
+/*
+ * RTC configuration
+ */
+#define CONFIG_RTC_MPC5200	1	/* use internal MPC5200 RTC */
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP			/* undef to save memory	    */
+#define CFG_PROMPT		"=> "	/* Monitor Command Prompt   */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE		1024	/* Console I/O Buffer Size  */
+#else
+#define CFG_CBSIZE		256	/* Console I/O Buffer Size  */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS		16	/* max number of command args	*/
+#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size	*/
+
+/* Enable an alternate, more extensive memory test */
+#define CFG_ALT_MEMTEST
+
+#define CFG_MEMTEST_START	0x00100000	/* memtest works on */
+#define CFG_MEMTEST_END		0x00f00000	/* 1 ... 15 MB in DRAM	*/
+
+#define CFG_LOAD_ADDR		0x100000	/* default load address */
+
+#define CFG_HZ			1000	/* decrementer freq: 1 ms ticks */
+
+/*
+ * Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined,
+ * which is normally part of the default commands (CFV_CMD_DFL)
+ */
+#define CONFIG_LOOPW
+
+/*
+ * Various low-level settings
+ */
+#if defined(CONFIG_MPC5200)
+#define CFG_HID0_INIT		HID0_ICE | HID0_ICFI
+#define CFG_HID0_FINAL		HID0_ICE
+#else
+#define CFG_HID0_INIT		0
+#define CFG_HID0_FINAL		0
+#endif
+
+#define CFG_BOOTCS_START	CFG_FLASH_BASE
+#define CFG_BOOTCS_SIZE		CFG_FLASH_SIZE
+#ifdef CFG_PCISPEED_66
+#define CFG_BOOTCS_CFG		0x0008DF30 /* for pci_clk  = 66 MHz */
+#else
+#define CFG_BOOTCS_CFG		0x0004DF30 /* for pci_clk = 33 MHz */
+#endif
+#define CFG_CS0_START		CFG_FLASH_BASE
+#define CFG_CS0_SIZE		CFG_FLASH_SIZE
+
+/* automatic configuration of chip selects */
+#ifdef CONFIG_CS_AUTOCONF
+#define CONFIG_LAST_STAGE_INIT
+#endif
+
+/*
+ * SRAM - Do not map below 2 GB in address space, because this area is used
+ * for SDRAM autosizing.
+ */
+#define CFG_CS2_START		0xE5000000
+#define CFG_CS2_SIZE		0x80000		/* 512 kByte */
+#define CFG_CS2_CFG		0x0004D930
+
+/*
+ * Grafic controller - Do not map below 2 GB in address space, because this
+ * area is used for SDRAM autosizing.
+ */
+#define SM501_FB_BASE           0xE0000000
+#define CFG_CS1_START           (SM501_FB_BASE)
+#define CFG_CS1_SIZE            0x4000000       /* 64 MByte */
+#define CFG_CS1_CFG             0x8F48FF70
+#define SM501_MMIO_BASE         CFG_CS1_START + 0x03E00000
+
+#define CFG_CS_BURST            0x00000000
+#define CFG_CS_DEADCYCLE        0x33333311      /* 1 dead cycle for flash and SM501 */
+
+#define CFG_RESET_ADDRESS	0xff000000
+
+#endif /* __CONFIG_H */
diff --git a/include/linux/list.h b/include/linux/list.h
index d2a7d43..e6492f7 100644
--- a/include/linux/list.h
+++ b/include/linux/list.h
@@ -30,7 +30,7 @@
 } while (0)
 
 /*
- * Insert a new entry between two known consecutive entries. 
+ * Insert a new entry between two known consecutive entries.
  *
  * This is only for internal list manipulation where we know
  * the prev/next entries already!
@@ -103,7 +103,7 @@
 static inline void list_del_init(struct list_head *entry)
 {
 	__list_del(entry->prev, entry->next);
-	INIT_LIST_HEAD(entry); 
+	INIT_LIST_HEAD(entry);
 }
 
 /**
@@ -113,8 +113,8 @@
  */
 static inline void list_move(struct list_head *list, struct list_head *head)
 {
-        __list_del(list->prev, list->next);
-        list_add(list, head);
+	__list_del(list->prev, list->next);
+	list_add(list, head);
 }
 
 /**
@@ -125,8 +125,8 @@
 static inline void list_move_tail(struct list_head *list,
 				  struct list_head *head)
 {
-        __list_del(list->prev, list->next);
-        list_add_tail(list, head);
+	__list_del(list->prev, list->next);
+	list_add_tail(list, head);
 }
 
 /**
@@ -195,7 +195,7 @@
  */
 #define list_for_each(pos, head) \
 	for (pos = (head)->next, prefetch(pos->next); pos != (head); \
-        	pos = pos->next, prefetch(pos->next))
+		pos = pos->next, prefetch(pos->next))
 /**
  * list_for_each_prev	-	iterate over a list backwards
  * @pos:	the &struct list_head to use as a loop counter.
@@ -203,8 +203,8 @@
  */
 #define list_for_each_prev(pos, head) \
 	for (pos = (head)->prev, prefetch(pos->prev); pos != (head); \
-        	pos = pos->prev, prefetch(pos->prev))
-        	
+		pos = pos->prev, prefetch(pos->prev))
+
 /**
  * list_for_each_safe	-	iterate over a list safe against removal of list entry
  * @pos:	the &struct list_head to use as a loop counter.
@@ -224,7 +224,7 @@
 #define list_for_each_entry(pos, head, member)				\
 	for (pos = list_entry((head)->next, typeof(*pos), member),	\
 		     prefetch(pos->member.next);			\
-	     &pos->member != (head); 					\
+	     &pos->member != (head);					\
 	     pos = list_entry(pos->member.next, typeof(*pos), member),	\
 		     prefetch(pos->member.next))
 
@@ -237,16 +237,16 @@
  */
 #define list_for_each_entry_safe(pos, n, head, member)			\
 	for (pos = list_entry((head)->next, typeof(*pos), member),	\
-		n = list_entry(pos->member.next, typeof(*pos), member);	\
-	     &pos->member != (head); 					\
+		n = list_entry(pos->member.next, typeof(*pos), member); \
+	     &pos->member != (head);					\
 	     pos = n, n = list_entry(n->member.next, typeof(*n), member))
 
 /**
- * list_for_each_entry_continue -       iterate over list of given type
- *                      continuing after existing point
- * @pos:        the type * to use as a loop counter.
- * @head:       the head for your list.
- * @member:     the name of the list_struct within the struct.
+ * list_for_each_entry_continue -	iterate over list of given type
+ *			continuing after existing point
+ * @pos:	the type * to use as a loop counter.
+ * @head:	the head for your list.
+ * @member:	the name of the list_struct within the struct.
  */
 #define list_for_each_entry_continue(pos, head, member)			\
 	for (pos = list_entry(pos->member.next, typeof(*pos), member),	\