tree 2a557d4b97d84b01ef3aa3100249bad2d208d8b4
parent 1cb19fbb31dc7fd2c3a15667c60c6296d392f96c
author York Sun <yorksun@freescale.com> 1372185465 -0700
committer York Sun <yorksun@freescale.com> 1376077299 -0700

powerpc/mpc8xxx: Set inactive csn_bnds to 0xffffffff

When chip select interleaving is enabled, cs0_bnds is used for address
binding. Other csn_bnds are not used. When two controllers interleaving is
enabled, cs0_bnds of both controllers are used, other csn_bnds are not.
However, the unused csn_bnds may be used internally for calculating
addresses for calibration. Setting those registers to 0 may confuse
controllers in some cases. Instead, setting them to 0xffffffff together
with normal LAWs will guarantee the address is not mapped to DDR.

Signed-off-by: York Sun <yorksun@freescale.com>