tree 25991230dff7c0a288defaebe4e2244dc25b25c8
parent c44b3f523c48b544f9268410a9e0c26ea6fb7c5c
author Marek Szyprowski <m.szyprowski@samsung.com> 1590406795 +0200
committer Matthias Brugger <mbrugger@suse.com> 1594302372 +0200

rpi4: add a mapping for the PCIe XHCI controller MMIO registers (ARM 64bit)

Create a non-cacheable mapping for the 0x600000000 physical memory region,
where MMIO registers for the PCIe XHCI controller are instantiated by the
PCIe bridge.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>