tree 61893df2fd2a1685b47fb28fd7411b8afd288049
parent 30563a04bff73fd4fbd840b846f4b6459759a839
author Nishanth Menon <nm@ti.com> 1257776974 -0500
committer Tom Rix <Tom.Rix@windriver.com> 1259360777 -0600

OMAP3: Fix SDRC init

Defaults are for Infineon DDR timings.
Since none of the supported boards currently do
XIP boot, these seem to be faulty. fix the values
as per the calculations(ACTIMA,B), conf
the sdrc power with pwdnen and wakeupproc bits

Signed-off-by: Nishanth Menon <nm@ti.com>