OMAP3: Fix SDRC init
Defaults are for Infineon DDR timings.
Since none of the supported boards currently do
XIP boot, these seem to be faulty. fix the values
as per the calculations(ACTIMA,B), conf
the sdrc power with pwdnen and wakeupproc bits
Signed-off-by: Nishanth Menon <nm@ti.com>
diff --git a/include/asm-arm/arch-omap3/cpu.h b/include/asm-arm/arch-omap3/cpu.h
index 8ab2e39..e51c4f3 100644
--- a/include/asm-arm/arch-omap3/cpu.h
+++ b/include/asm-arm/arch-omap3/cpu.h
@@ -222,6 +222,7 @@
#define PAGEPOLICY_HIGH (0x1 << 0)
#define SRFRONRESET (0x1 << 7)
+#define PWDNEN (0x1 << 2)
#define WAKEUPPROC (0x1 << 26)
#define DDR_SDRAM (0x1 << 0)