ARM: dts: uniphier: sync with Linux
This commit imports device tree updates from Linux. It eventually
adds pinctrl-related nodes and properties.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi b/arch/arm/dts/uniphier-ph1-sld8.dtsi
index 15df50f..7d06f7e 100644
--- a/arch/arm/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld8.dtsi
@@ -28,6 +28,18 @@
compatible = "fixed-clock";
clock-frequency = <50000000>;
};
+
+ uart_clk: uart_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <80000000>;
+ };
+
+ iobus_clk: iobus_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <100000000>;
+ };
};
soc {
@@ -43,68 +55,100 @@
#size-cells = <1>;
};
- uart0: serial@54006800 {
+ serial0: serial@54006800 {
compatible = "socionext,uniphier-uart";
status = "disabled";
- reg = <0x54006800 0x20>;
+ reg = <0x54006800 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart0>;
+ interrupts = <0 33 4>;
+ clocks = <&uart_clk>;
clock-frequency = <80000000>;
};
- uart1: serial@54006900 {
+ serial1: serial@54006900 {
compatible = "socionext,uniphier-uart";
status = "disabled";
- reg = <0x54006900 0x20>;
+ reg = <0x54006900 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ interrupts = <0 35 4>;
+ clocks = <&uart_clk>;
clock-frequency = <80000000>;
};
- uart2: serial@54006a00 {
+ serial2: serial@54006a00 {
compatible = "socionext,uniphier-uart";
status = "disabled";
- reg = <0x54006a00 0x20>;
+ reg = <0x54006a00 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ interrupts = <0 37 4>;
+ clocks = <&uart_clk>;
clock-frequency = <80000000>;
};
- uart3: serial@54006b00 {
+ serial3: serial@54006b00 {
compatible = "socionext,uniphier-uart";
status = "disabled";
- reg = <0x54006b00 0x20>;
+ reg = <0x54006b00 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ interrupts = <0 29 4>;
+ clocks = <&uart_clk>;
clock-frequency = <80000000>;
};
i2c0: i2c@58400000 {
compatible = "socionext,uniphier-i2c";
+ status = "disabled";
+ reg = <0x58400000 0x40>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58400000 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c0>;
+ interrupts = <0 41 1>;
+ clocks = <&iobus_clk>;
clock-frequency = <100000>;
- status = "disabled";
};
i2c1: i2c@58480000 {
compatible = "socionext,uniphier-i2c";
+ status = "disabled";
+ reg = <0x58480000 0x40>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58480000 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ interrupts = <0 42 1>;
+ clocks = <&iobus_clk>;
clock-frequency = <100000>;
- status = "disabled";
};
+ /* chip-internal connection for DMD */
i2c2: i2c@58500000 {
compatible = "socionext,uniphier-i2c";
+ reg = <0x58500000 0x40>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58500000 0x40>;
- clock-frequency = <100000>;
- status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ interrupts = <0 43 1>;
+ clocks = <&iobus_clk>;
+ clock-frequency = <400000>;
};
i2c3: i2c@58580000 {
compatible = "socionext,uniphier-i2c";
+ status = "disabled";
+ reg = <0x58580000 0x40>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58580000 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ interrupts = <0 44 1>;
+ clocks = <&iobus_clk>;
clock-frequency = <100000>;
- status = "disabled";
};
system-bus-controller-misc@59800000 {
@@ -117,18 +161,33 @@
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a800100 0x100>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb0>;
+ interrupts = <0 80 4>;
};
usb1: usb@5a810100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a810100 0x100>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb1>;
+ interrupts = <0 81 4>;
};
usb2: usb@5a820100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a820100 0x100>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb2>;
+ interrupts = <0 82 4>;
+ };
+
+ pinctrl: pinctrl@5f801000 {
+ compatible = "socionext,ph1-sld8-pinctrl",
+ "syscon";
+ reg = <0x5f801000 0xe00>;
};
timer@60000200 {
@@ -160,3 +219,5 @@
};
};
};
+
+/include/ "uniphier-pinctrl.dtsi"