stm32mp1: clk: support digital bypass

HSE and LSE bypass shall support both analog and digital signals.
This patch add a way to select digital bypas case in the device tree
and set the associated bit DIGBYP in RCC_BDCR and RCC_OCEN register
during clock tree initialization.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
diff --git a/doc/device-tree-bindings/clock/st,stm32mp1.txt b/doc/device-tree-bindings/clock/st,stm32mp1.txt
index c29d90f..6a9397e 100644
--- a/doc/device-tree-bindings/clock/st,stm32mp1.txt
+++ b/doc/device-tree-bindings/clock/st,stm32mp1.txt
@@ -170,8 +170,10 @@
 
 a) for external oscillator: "clk-lse", "clk-hse"
 
-	3 optional fields are managed
+	4 optional fields are managed
 	- "st,bypass" Configure the oscillator bypass mode (HSEBYP, LSEBYP)
+	- "st,digbypass" Configure the bypass mode as full-swing digital signal
+	  (DIGBYP)
 	- "st,css" Activate the clock security system (HSECSSON, LSECSSON)
 	- "st,drive" (only for LSE) value of the drive for the oscillator
 	   (see LSEDRV_ define in the file dt-bindings/clock/stm32mp1-clksrc.h)