| commit | d0686a02b98ee264532c25108edc3ba44acc1145 | [log] [tgz] |
|---|---|---|
| author | Sean Anderson <seanga2@gmail.com> | Thu Apr 08 22:13:04 2021 -0400 |
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | Fri May 14 16:20:47 2021 +0800 |
| tree | adcffc10cdb141a5aabfc93836602df271c71f7c | |
| parent | 8c12cb3fd80304d4d542d35405aa54ae4a317e9b [diff] |
clk: k210: Fix PLLs not being enabled After starting or setting the rate of a PLL, the enable bit must be set. This fixes a bug where the AI ram would not be accessible, because it requires PLL1 to be running. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Damien Le Moal <damien.lemoal@wdc.com>