tree f321b9a57ce6d32567df53a53f9d97bbc9ee9665
parent 99c2fdab91bc633e46fb41dbaa629f87ccf6e00f
author Jon Loeliger <jdl@freescale.com> 1186083740 -0500
committer Jon Loeliger <jdl@freescale.com> 1186761752 -0500

cpu/86xx fixes.

Remove rev 1 fixes.
Always set PICGCR_MODE.
Enable machine check and provide board config option
to set and handle SoC error interrupts.

Include MSSSR0 in error message.

Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>