pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' iomux
RK3288 pmu_gpio0 iomux setting have no higher 16 writing corresponding
bits, need to read before write the register.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index 1fa601d..5040cd8 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -54,7 +54,15 @@
}
}
- data = (mask << (bit + 16));
+ /* bank0 is special, there are no higher 16 bit writing bits. */
+ if (bank->bank_num == 0) {
+ regmap_read(regmap, reg, &data);
+ data &= ~(mask << bit);
+ } else {
+ /* enable the write to the equivalent lower bits */
+ data = (mask << (bit + 16));
+ }
+
data |= (mux & mask) << bit;
ret = regmap_write(regmap, reg, data);