riscv: ax25-ae350: add SPL configuration
This patch provides four configurations which can support U-Boot SPL
to boot from RAM or FLASH and then boot FIT image including OpenSBI
FW_DYNAMIC firmware and U-Boot proper images from RAM or MMC boot devices.
With ae350_rv[32|64]_spl_defconfigs:
U-Boot SPL will be loaded by gdb or FSBL and runs in RAM in machine mode
and then load FIT image from RAM device on AE350.
With ae350_rv[32|64]_spl_xip_defconfigs:
U-Boot SPL can be burned into SPI flash and run in flash in machine mode
and then load FIT image from SPI flash or MMC device on AE350.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
diff --git a/board/AndesTech/ax25-ae350/Kconfig b/board/AndesTech/ax25-ae350/Kconfig
index 5e682b6..321dd0c 100644
--- a/board/AndesTech/ax25-ae350/Kconfig
+++ b/board/AndesTech/ax25-ae350/Kconfig
@@ -21,9 +21,18 @@
config ENV_OFFSET
default 0x140000 if ENV_IS_IN_SPI_FLASH
+config SPL_TEXT_BASE
+ default 0x800000
+
+config SPL_OPENSBI_LOAD_ADDR
+ default 0x01000000
+
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select RISCV_NDS
+ select SUPPORT_SPL
imply SMP
+ imply SPL_RAM_SUPPORT
+ imply SPL_RAM_DEVICE
endif
diff --git a/board/AndesTech/ax25-ae350/MAINTAINERS b/board/AndesTech/ax25-ae350/MAINTAINERS
index feed5d1..eebee16 100644
--- a/board/AndesTech/ax25-ae350/MAINTAINERS
+++ b/board/AndesTech/ax25-ae350/MAINTAINERS
@@ -7,3 +7,7 @@
F: configs/ae350_rv64_defconfig
F: configs/ae350_rv32_xip_defconfig
F: configs/ae350_rv64_xip_defconfig
+F: configs/ae350_rv32_spl_defconfig
+F: configs/ae350_rv64_spl_defconfig
+F: configs/ae350_rv32_spl_xip_defconfig
+F: configs/ae350_rv64_spl_xip_defconfig
diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c
index b43eebb..b0164a9 100644
--- a/board/AndesTech/ax25-ae350/ax25-ae350.c
+++ b/board/AndesTech/ax25-ae350/ax25-ae350.c
@@ -12,6 +12,7 @@
#include <faraday/ftsmc020.h>
#include <fdtdec.h>
#include <dm.h>
+#include <spl.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -110,3 +111,29 @@
return 0;
}
#endif
+
+#ifdef CONFIG_SPL
+void board_boot_order(u32 *spl_boot_list)
+{
+ u8 i;
+ u32 boot_devices[] = {
+#ifdef CONFIG_SPL_RAM_SUPPORT
+ BOOT_DEVICE_RAM,
+#endif
+#ifdef CONFIG_SPL_MMC_SUPPORT
+ BOOT_DEVICE_MMC1,
+#endif
+ };
+
+ for (i = 0; i < ARRAY_SIZE(boot_devices); i++)
+ spl_boot_list[i] = boot_devices[i];
+}
+#endif
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+ /* boot using first FIT config */
+ return 0;
+}
+#endif