esdhc: Add CONFIG_SYS_FSL_ESDHC_LE and CONFIG_SYS_FSL_ESDHC_BE macros
For LS102xA, the processor is in little-endian mode, while esdhc IP is
in big-endian mode. CONFIG_SYS_FSL_ESDHC_LE and CONFIG_SYS_FSL_ESDHC_BE
are added. So accessing ESDHC registers can be determined by ESDHC IP's
endian mode.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
diff --git a/doc/README.fsl-esdhc b/doc/README.fsl-esdhc
new file mode 100644
index 0000000..b70f271
--- /dev/null
+++ b/doc/README.fsl-esdhc
@@ -0,0 +1,5 @@
+CONFIG_SYS_FSL_ESDHC_LE means ESDHC IP is in little-endian mode.
+CONFIG_SYS_FSL_ESDHC_BE means ESDHC IP is in big-endian mode.
+
+Accessing ESDHC registers can be determined by ESDHC IP's endian
+mode or processor's endian mode.