commit c415919d5790977b2d498105c5dc3475bb0895e6
author Eric Nelson <eric.nelson@boundarydevices.com> Sun Mar 04 11:47:37 2012 +0000
committer Albert ARIBAUD <albert.u.boot@aribaud.net> Mon Apr 16 14:53:58 2012 +0200
tree 373b3d2cb9beaa1338d08e7df3db4696c44f6de4
parent 148241053123f3c2388d755807438fbe44dd2139

i.MX6: define CACHELINE_SIZE

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>

arch/arm/include/asm/arch-mx6/imx-regs.h

diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index cad957a..1033d05 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -19,6 +19,8 @@
 #ifndef __ASM_ARCH_MX6_IMX_REGS_H__
 #define __ASM_ARCH_MX6_IMX_REGS_H__
 
+#define CONFIG_SYS_CACHELINE_SIZE	32
+
 #define ROMCP_ARB_BASE_ADDR             0x00000000
 #define ROMCP_ARB_END_ADDR              0x000FFFFF
 #define CAAM_ARB_BASE_ADDR              0x00100000