| commit | be16c41f853e9cf0f7f85cc96e8fb5c27a74d57a | [log] [tgz] |
|---|---|---|
| author | Patrick Delaunay <patrick.delaunay@st.com> | Tue Jul 30 19:16:13 2019 +0200 |
| committer | Patrice Chotard <patrice.chotard@st.com> | Tue Aug 27 09:36:56 2019 +0200 |
| tree | e1c755bc80881af62c8c392a60f9aaa1a2b658f8 | |
| parent | fe9153364423842e053a9600efa333be20525128 [diff] |
ARM: dts: stm32mp1: DDR config v1.45 Update DDR configuration with the latest update: - Change DQSGE to 1 for DDR3, to cure missing DQS preamble. Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>